From 82b08d0e3ac2f40f699253dd06e883f84bfd403f Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Wed, 17 Apr 2019 08:53:34 -0400 Subject: [PATCH] Corrects addressing behaviour of nRd[+-]. --- OSBindings/Mac/Clock SignalTests/QLTests.mm | 10 +++++----- .../68000/Implementation/68000Implementation.hpp | 14 +++++++------- Processors/68000/Implementation/68000Storage.cpp | 3 ++- 3 files changed, 14 insertions(+), 13 deletions(-) diff --git a/OSBindings/Mac/Clock SignalTests/QLTests.mm b/OSBindings/Mac/Clock SignalTests/QLTests.mm index 4884ed8f6..35b5f0f4b 100644 --- a/OSBindings/Mac/Clock SignalTests/QLTests.mm +++ b/OSBindings/Mac/Clock SignalTests/QLTests.mm @@ -70,21 +70,21 @@ class QL: public CPU::MC68000::BusHandler { default: break; case Microcycle::SelectWord | Microcycle::Read: -// printf("[word r %08x] ", *cycle.address); cycle.value->full = is_peripheral ? peripheral_result : base[word_address]; + if(!(cycle.operation & Microcycle::IsProgram)) printf("[word r %08x -> %04x] ", *cycle.address, cycle.value->full); break; case Microcycle::SelectByte | Microcycle::Read: -// printf("[byte r %08x] ", *cycle.address); cycle.value->halves.low = (is_peripheral ? peripheral_result : base[word_address]) >> cycle.byte_shift(); + if(!(cycle.operation & Microcycle::IsProgram)) printf("[byte r %08x -> %02x] ", *cycle.address, cycle.value->halves.low); break; case Microcycle::SelectWord: assert(!(is_rom && !is_peripheral)); -// printf("[word w %08x <- %04x] ", *cycle.address, cycle.value->full); + if(!(cycle.operation & Microcycle::IsProgram)) printf("[word w %08x <- %04x] ", *cycle.address, cycle.value->full); if(!is_peripheral) base[word_address] = cycle.value->full; break; case Microcycle::SelectByte: assert(!(is_rom && !is_peripheral)); -// printf("[byte w %08x <- %02x] ", *cycle.address, (cycle.value->full >> cycle.byte_shift()) & 0xff); + if(!(cycle.operation & Microcycle::IsProgram)) printf("[byte w %08x <- %02x] ", *cycle.address, (cycle.value->full >> cycle.byte_shift()) & 0xff); if(!is_peripheral) base[word_address] = (cycle.value->full & cycle.byte_mask()) | (base[word_address] & (0xffff ^ cycle.byte_mask())); break; } @@ -115,7 +115,7 @@ class QL: public CPU::MC68000::BusHandler { - (void)testStartup { // This is an example of a functional test case. // Use XCTAssert and related functions to verify your tests produce the correct results. - _machine->run_for(HalfCycles(40000000)); + _machine->run_for(HalfCycles(16000000)); } @end diff --git a/Processors/68000/Implementation/68000Implementation.hpp b/Processors/68000/Implementation/68000Implementation.hpp index 9fd65f495..b098ecaa4 100644 --- a/Processors/68000/Implementation/68000Implementation.hpp +++ b/Processors/68000/Implementation/68000Implementation.hpp @@ -52,13 +52,13 @@ template void Processor: // no instruction was ongoing. Either way, do a standard instruction operation. // TODO: unless an interrupt is pending, or the trap flag is set. - if(address_[5].full > 0x3fff0 || program_counter_.full < 0x16a) { - std::cout << std::setfill('0'); - std::cout << (extend_flag_ ? 'x' : '-') << (negative_flag_ ? 'n' : '-') << (zero_result_ ? '-' : 'z'); - std::cout << (overflow_flag_ ? 'v' : '-') << (carry_flag_ ? 'c' : '-') << '\t'; - for(int c = 0; c < 8; ++ c) std::cout << "d" << c << ":" << std::setw(8) << data_[c].full << " "; - for(int c = 0; c < 8; ++ c) std::cout << "a" << c << ":" << std::setw(8) << address_[c].full << " "; - } +// if(program_counter_.full >= 0x25c && program_counter_.full < 0x286) { +// std::cout << std::setfill('0'); +// std::cout << (extend_flag_ ? 'x' : '-') << (negative_flag_ ? 'n' : '-') << (zero_result_ ? '-' : 'z'); +// std::cout << (overflow_flag_ ? 'v' : '-') << (carry_flag_ ? 'c' : '-') << '\t'; +// for(int c = 0; c < 8; ++ c) std::cout << "d" << c << ":" << std::setw(8) << data_[c].full << " "; +// for(int c = 0; c < 8; ++ c) std::cout << "a" << c << ":" << std::setw(8) << address_[c].full << " "; +// } std::cout << '\n'; decoded_instruction_ = prefetch_queue_.halves.high.full; diff --git a/Processors/68000/Implementation/68000Storage.cpp b/Processors/68000/Implementation/68000Storage.cpp index 09f9b5344..6a635f1b8 100644 --- a/Processors/68000/Implementation/68000Storage.cpp +++ b/Processors/68000/Implementation/68000Storage.cpp @@ -239,7 +239,8 @@ struct ProcessorStorageConstructor { step.microcycle.length = HalfCycles(3); step.microcycle.operation |= (read_full_words ? Microcycle::SelectWord : Microcycle::SelectByte) | (is_read ? Microcycle::Read : 0); if(post_adjustment) { - if(tolower(token[1]) == 'r') { + // nr and nR should affect address 0; nw, nW, nrd and nRd should affect address 1. + if(tolower(token[1]) == 'r' && token.size() == 2) { step.action = (post_adjustment > 0) ? Action::IncrementEffectiveAddress0 : Action::DecrementEffectiveAddress0; } else { step.action = (post_adjustment > 0) ? Action::IncrementEffectiveAddress1 : Action::DecrementEffectiveAddress1;