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https://github.com/TomHarte/CLK.git
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Divide input pixel rate.
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parent
417c6c4629
commit
847dba8f07
@ -108,6 +108,18 @@ struct Video {
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case 0xe0:
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case 0xe0:
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logger.error().append("TODO: video control: %08x", value);
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logger.error().append("TODO: video control: %08x", value);
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// Set pixel rate.
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//
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// TODO: possibly do this as a multiplier on position counts and a divider on pixels,
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// to maintain a consistent CRT data clock?
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switch(value & 0b11) {
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case 0b00: clock_divider_ = 12; break; // 4Mhz count.
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case 0b01: clock_divider_ = 8; break; // 6Mhz count.
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case 0b10: clock_divider_ = 6; break; // 8Mhz count.
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case 0b11: clock_divider_ = 4; break; // i.e. 48/4 = 12Mhz position counting clock.
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}
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sub_clock_ = 0;
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break;
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break;
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//
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//
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@ -123,7 +135,6 @@ struct Video {
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sound_.set_frequency(value & 0x7f);
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sound_.set_frequency(value & 0x7f);
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break;
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break;
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default:
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default:
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logger.error().append("TODO: unrecognised VIDC write of %08x", value);
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logger.error().append("TODO: unrecognised VIDC write of %08x", value);
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break;
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break;
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@ -131,6 +142,18 @@ struct Video {
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}
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}
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void tick() {
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void tick() {
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// Apply clock divider to get 8, 12, 16 or 24 Mhz pixel rate as user-selected,
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// which since all event positioning is at two-pixel boundaries means a
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// 4, 6, 8 or 12 Mhz counting clock.
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//
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// tick() is called at 12Mhz.
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sub_clock_ += 4; // Count at 48 Mhz.
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if(sub_clock_ < clock_divider_) {
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return;
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}
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sub_clock_ -= clock_divider_;
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// TODO: real output. For now, just count up to complete frames and pretend a retrace goes there.
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++position_;
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++position_;
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if(position_ >= horizontal_.period * vertical_.period) {
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if(position_ >= horizontal_.period * vertical_.period) {
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entered_sync_ = true;
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entered_sync_ = true;
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@ -152,7 +175,7 @@ private:
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SoundT &sound_;
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SoundT &sound_;
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// TODO: real video output.
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// TODO: real video output.
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int position_ = 0;
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uint32_t position_ = 0;
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struct Dimension {
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struct Dimension {
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uint32_t period = 0;
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uint32_t period = 0;
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@ -166,6 +189,9 @@ private:
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};
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};
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Dimension horizontal_, vertical_;
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Dimension horizontal_, vertical_;
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bool entered_sync_ = false;
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bool entered_sync_ = false;
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int sub_clock_ = 0;
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int clock_divider_ = 0;
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};
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};
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}
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}
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