From 8608f0f89d7b383650f6a0f1b0dc9121df843092 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Thu, 7 Dec 2023 12:05:15 -0500 Subject: [PATCH] Adjust CGA clocking down by 1/7th. --- Machines/PCCompatible/CGA.hpp | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/Machines/PCCompatible/CGA.hpp b/Machines/PCCompatible/CGA.hpp index ce47ee18e..b73744ac9 100644 --- a/Machines/PCCompatible/CGA.hpp +++ b/Machines/PCCompatible/CGA.hpp @@ -30,11 +30,12 @@ class CGA { void run_for(Cycles cycles) { // Input rate is the PIT rate of 1,193,182 Hz. - // CGA is clocked at the real oscillator rate of 14 times that. - // But there's also an internal divide by 8 to align to the fetch clock. - full_clock_ += 7 * cycles.as(); + // CGA is clocked at the real oscillator rate of 12 times that. + // But there's also an internal divide by 8 to align to the 80-cfetch clock. + // ... and 12/8 = 3/2. + full_clock_ += 3 * cycles.as(); - const int modulo = 4 * outputter_.clock_divider; + const int modulo = 2 * outputter_.clock_divider; crtc_.run_for(Cycles(full_clock_ / modulo)); full_clock_ %= modulo; } @@ -90,7 +91,7 @@ class CGA { } Outputs::Display::ScanStatus get_scaled_scan_status() const { - return outputter_.crt.get_scaled_scan_status() * 4.0f / (7.0f * 8.0f); + return outputter_.crt.get_scaled_scan_status() * float(outputter_.clock_divider) / (3.0f * 4.0f); } private: