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Formalised set_interrupt_line's optional parameter as being a count of HalfCycles; corrected PartialMachineCycle.is_wait and effected the proper timing for counter reset on a ZX81.
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@ -99,8 +99,12 @@ HalfCycles Machine::perform_machine_cycle(const CPU::Z80::PartialMachineCycle &c
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} break;
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case CPU::Z80::PartialMachineCycle::Interrupt:
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// resetting event is M1 and IOREQ both simultaneously having leading edges;
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// that happens 2 cycles before the end of INTACK. So the timer was reset and
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// now has advanced twice.
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horizontal_counter_ = HalfCycles(2);
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*cycle.value = 0xff;
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horizontal_counter_ = 0;
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break;
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case CPU::Z80::PartialMachineCycle::Refresh:
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@ -109,7 +113,7 @@ HalfCycles Machine::perform_machine_cycle(const CPU::Z80::PartialMachineCycle &c
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// final two cycles of an opcode fetch. Therefore communicate a transient signalling
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// of the IRQ line if necessary.
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if(!(address & 0x40)) {
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set_interrupt_line(true, -2);
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set_interrupt_line(true, Cycles(-2));
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set_interrupt_line(false);
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}
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if(has_latched_video_byte_) {
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@ -126,8 +130,7 @@ HalfCycles Machine::perform_machine_cycle(const CPU::Z80::PartialMachineCycle &c
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}
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break;
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case CPU::Z80::PartialMachineCycle::ReadOpcodeStart:
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case CPU::Z80::PartialMachineCycle::ReadOpcodeWait:
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case CPU::Z80::PartialMachineCycle::ReadOpcode:
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// Check for use of the fast tape hack.
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if(use_fast_tape_hack_ && address == tape_trap_address_ && tape_player_.has_tape()) {
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uint64_t prior_offset = tape_player_.get_tape()->get_offset();
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@ -104,7 +104,7 @@ struct PartialMachineCycle {
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return operation <= Operation::BusAcknowledge;
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}
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inline bool is_wait() const {
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return operation >= Operation::ReadWait && operation <= Operation::InterruptWait;
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return operation >= Operation::ReadOpcodeWait && operation <= Operation::InterruptWait;
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}
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};
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@ -1894,7 +1894,7 @@ template <class T> class Processor {
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how many cycles before now the line changed state. The value may not be longer than the
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current machine cycle. If called at any other time, this must be zero.
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*/
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void set_interrupt_line(bool value, int offset = 0) {
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void set_interrupt_line(bool value, HalfCycles offset = 0) {
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if(irq_line_ == value) return;
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// IRQ requests are level triggered and masked.
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@ -1908,7 +1908,7 @@ template <class T> class Processor {
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// If this change happened at least one cycle ago then: (i) we're promised that this is a machine
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// cycle per the contract on supplying an offset; and (ii) that means it happened before the lines
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// were sampled. So adjust the most recent sample.
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if(offset < 0) {
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if(offset <= HalfCycles(-2)) {
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last_request_status_ = (last_request_status_ & ~Interrupt::IRQ) | (request_status_ & Interrupt::IRQ);
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}
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}
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