From 8a765031e1a0e66419f0fe4e2dc361baf20e8568 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Sun, 12 Apr 2026 19:02:55 -0400 Subject: [PATCH] Make `access` a 6809 norm; expose MO6 to SDL users. --- Analyser/Static/Thomson/Target.hpp | 8 -------- Machines/Thomson/MO5/MO5.cpp | 27 +++++---------------------- Processors/6809/6809.hpp | 27 ++++++++++++++++++++++++++- 3 files changed, 31 insertions(+), 31 deletions(-) diff --git a/Analyser/Static/Thomson/Target.hpp b/Analyser/Static/Thomson/Target.hpp index dceefab3c..a8a0a0d6f 100644 --- a/Analyser/Static/Thomson/Target.hpp +++ b/Analyser/Static/Thomson/Target.hpp @@ -33,14 +33,6 @@ private: DeclareField(floppy); AnnounceEnum(Model); DeclareField(model); - - // TODO: eliminate this if/when MO6 emulation works. - limit_enum( - &model, - Model::MO5v1, - Model::MO5v11, - -1 - ); } }; diff --git a/Machines/Thomson/MO5/MO5.cpp b/Machines/Thomson/MO5/MO5.cpp index d21fca280..ad2caef60 100644 --- a/Machines/Thomson/MO5/MO5.cpp +++ b/Machines/Thomson/MO5/MO5.cpp @@ -112,27 +112,6 @@ struct ConcreteMachine: audio_queue_.lock_flush(); } - template < - int address, - CPU::M6809::ReadWrite read_write, - typename ComponentT - > - static void access(ComponentT &component, CPU::M6809::data_t value) { - if constexpr (CPU::M6809::is_read(read_write)) { - if constexpr (requires { component.operator->(); }) { - value = component->template read
(); - } else { - value = component.template read
(); - } - } else { - if constexpr (requires { component.operator->(); }) { - component->template write
(value); - } else { - component.template write
(value); - } - } - } - template < CPU::M6809::BusPhase bus_phase, CPU::M6809::LIC lic, @@ -181,6 +160,9 @@ struct ConcreteMachine: }; switch(address) { + // TODO: Is there a simpler way to use `namespace`? + using namespace CPU::M6809; + case 0xa7c0: access<0xa7c0, read_write>(system_pia_, value); break; case 0xa7c1: access<0xa7c1, read_write>(system_pia_, value); break; case 0xa7c2: access<0xa7c2, read_write>(system_pia_, value); break; @@ -199,6 +181,7 @@ struct ConcreteMachine: case 0xa7e4: if(is_mo6) access<0xa7e4, read_write>(memory_, value); else unmapped(); break; + // TODO: consolidate below. case 0xa7e5: if constexpr (is_mo6) { if(memory_.access_mode() == AccessMode::System) { @@ -220,7 +203,7 @@ struct ConcreteMachine: access<0xa7e6, read_write>(memory_, value); } else { if constexpr (CPU::M6809::is_read(read_write)) { - value = video_->horizontal_state(); + access<0xa7e6, read_write>(video_, value); } else { memory_.template write<0xa7e6>(value); } diff --git a/Processors/6809/6809.hpp b/Processors/6809/6809.hpp index ea1b7b674..7220022aa 100644 --- a/Processors/6809/6809.hpp +++ b/Processors/6809/6809.hpp @@ -95,7 +95,6 @@ static constexpr Timescale duration([[maybe_unused]] const BusPhase phase) { } } - enum class Line { Halt, DMABusReq, @@ -157,6 +156,32 @@ using NoValue = Bus::Data::NoValue; template using data_t = Bus::Data::data_t; +// MARK: - Bus-access helper. + +/*! + Interprets @c read_write to perform either a `read
` or a `write
` on `component`. +*/ +template < + int address, + ReadWrite read_write, + typename ComponentT +> +static void access(ComponentT &component, CPU::M6809::data_t value) { + if constexpr (CPU::M6809::is_read(read_write)) { + if constexpr (requires { component.operator->(); }) { + value = component->template read
(); + } else { + value = component.template read
(); + } + } else { + if constexpr (requires { component.operator->(); }) { + component->template write
(value); + } else { + component.template write
(value); + } + } +} + // MARK: - Code-generation choices. enum class PausePrecision {