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https://github.com/TomHarte/CLK.git
synced 2025-02-16 18:30:32 +00:00
Starts a dash towards just completing the addressing modes for now.
This brings me up to the end of absolute long (i.e. 4a on the datasheet).
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bdc1136b96
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@ -37,8 +37,8 @@ template <typename BusHandler> void Processor<BusHandler>::run_for(const Cycles
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case OperationDecode: {
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case OperationDecode: {
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// A VERY TEMPORARY piece of logging.
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// A VERY TEMPORARY piece of logging.
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printf("%02x\n", instruction_buffer_.value);
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printf("[%04x] %02x\n", pc_ - 1, instruction_buffer_.value);
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active_instruction_ = &instructions[instruction_offset_ + instruction_buffer_.value];
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active_instruction_ = &instructions[instruction_buffer_.value];
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const auto size_flag = mx_flags_[active_instruction_->size_field];
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const auto size_flag = mx_flags_[active_instruction_->size_field];
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next_op_ = µ_ops_[active_instruction_->program_offsets[size_flag]];
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next_op_ = µ_ops_[active_instruction_->program_offsets[size_flag]];
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@ -69,6 +69,10 @@ template <typename BusHandler> void Processor<BusHandler>::run_for(const Cycles
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// Data fetches and stores.
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// Data fetches and stores.
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//
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//
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#define increment_data_address() data_address_ = (data_address_ & 0xff0000) + ((data_address_ + 1) & 0xffff)
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#define decrement_data_address() data_address_ = (data_address_ & 0xff0000) + ((data_address_ - 1) & 0xffff)
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case CycleFetchData:
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case CycleFetchData:
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bus_address = data_address_;
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bus_address = data_address_;
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bus_value = data_buffer_.next_input();
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bus_value = data_buffer_.next_input();
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@ -79,7 +83,7 @@ template <typename BusHandler> void Processor<BusHandler>::run_for(const Cycles
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bus_address = data_address_;
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bus_address = data_address_;
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bus_value = data_buffer_.next_input();
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bus_value = data_buffer_.next_input();
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bus_operation = MOS6502Esque::Read;
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bus_operation = MOS6502Esque::Read;
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++data_address_;
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increment_data_address();
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break;
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break;
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case CycleStoreData:
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case CycleStoreData:
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@ -92,16 +96,48 @@ template <typename BusHandler> void Processor<BusHandler>::run_for(const Cycles
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bus_address = data_address_;
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bus_address = data_address_;
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bus_value = data_buffer_.next_output();
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bus_value = data_buffer_.next_output();
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bus_operation = MOS6502Esque::Read;
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bus_operation = MOS6502Esque::Read;
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++data_address_;
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increment_data_address();
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break;
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break;
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case CycleStoreDecrementData:
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case CycleStoreDecrementData:
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bus_address = data_address_;
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bus_address = data_address_;
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bus_value = data_buffer_.next_output();
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bus_value = data_buffer_.next_output();
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bus_operation = MOS6502Esque::Read;
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bus_operation = MOS6502Esque::Read;
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--data_address_;
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decrement_data_address();
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break;
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break;
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#undef increment_data_address
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#undef decrement_data_address
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//
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// Stack accesses.
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//
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#define stack_access(value, operation) \
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if(emulation_flag_) { \
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bus_address = s_.halves.low | 0x100; \
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} else { \
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bus_address = s_.full; \
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} \
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bus_value = value; \
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bus_operation = operation;
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case CyclePush:
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stack_access(data_buffer_.next_stack(), MOS6502Esque::Write);
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--s_.full;
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break;
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case CyclePull:
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++s_.full;
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stack_access(data_buffer_.next_input(), MOS6502Esque::Read);
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break;
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case CycleAccessStack:
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stack_access(&throwaway, MOS6502Esque::Read);
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break;
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#undef stack_access
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//
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//
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// Data movement.
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// Data movement.
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//
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//
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@ -123,6 +159,10 @@ template <typename BusHandler> void Processor<BusHandler>::run_for(const Cycles
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data_address_ = instruction_buffer_.value | data_bank_;
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data_address_ = instruction_buffer_.value | data_bank_;
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break;
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break;
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case OperationConstructAbsoluteIndexedIndirect:
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data_address_ = (instruction_buffer_.value + (x_.full & x_masks_[1])) & 0xffff;
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break;
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//
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//
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// Performance.
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// Performance.
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//
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//
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@ -168,6 +208,30 @@ template <typename BusHandler> void Processor<BusHandler>::run_for(const Cycles
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data_buffer_.size = 2 - mx_flags_[0];
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data_buffer_.size = 2 - mx_flags_[0];
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break;
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break;
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//
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// Jumps.
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//
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case JML:
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program_bank_ = instruction_buffer_.value & 0xff0000;
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pc_ = instruction_buffer_.value & 0xffff;
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break;
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case JSL:
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program_bank_ = instruction_buffer_.value & 0xff0000;
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instruction_buffer_.size = 2;
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[[fallthrough]];
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case JSR: {
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const uint16_t old_pc = pc_;
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pc_ = instruction_buffer_.value;
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instruction_buffer_.value = old_pc;
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} break;
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case JSL: {
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} break;
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default:
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default:
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assert(false);
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assert(false);
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}
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}
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@ -207,7 +207,7 @@ struct ProcessorStorage {
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uint8_t mx_flags_[2] = {1, 1}; // [0] = m; [1] = x. In both cases either `0` or `1`; `1` => 8-bit.
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uint8_t mx_flags_[2] = {1, 1}; // [0] = m; [1] = x. In both cases either `0` or `1`; `1` => 8-bit.
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uint16_t m_masks_[2] = {0xff00, 0x00ff}; // [0] = src mask; [1] = dst mask.
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uint16_t m_masks_[2] = {0xff00, 0x00ff}; // [0] = src mask; [1] = dst mask.
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uint16_t x_masks_[2] = {0xff00, 0x00ff}; // [0] = src mask; [1] = dst mask.
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uint16_t x_masks_[2] = {0xff00, 0x00ff}; // [0] = src mask; [1] = dst mask.
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int instruction_offset_ = 0;
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bool emulation_flag_ = true;
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// I.e. the offset for direct addressing (outside of emulation mode).
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// I.e. the offset for direct addressing (outside of emulation mode).
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uint16_t direct_ = 0;
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uint16_t direct_ = 0;
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