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Takes a shot at fixing PEA for A7-relative addresses.

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Unit tests required. Tomorrow.
This commit is contained in:
Thomas Harte 2019-06-26 23:24:54 -04:00
parent da351a3e32
commit 8d39c3bc98
2 changed files with 9 additions and 9 deletions
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8
Processors/68000/Implementation/68000Implementation.hpp
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@ -59,7 +59,7 @@ template <class T, bool dtack_is_implicit, bool signal_will_perform> void Proces
const HalfCycles remaining_duration = duration + half_cycles_left_to_run_; const HalfCycles remaining_duration = duration + half_cycles_left_to_run_;
#ifdef LOG_TRACE #ifdef LOG_TRACE
static bool should_log = true; static bool should_log = false;
#endif #endif
// This loop counts upwards rather than downwards because it simplifies calculation of // This loop counts upwards rather than downwards because it simplifies calculation of
@ -295,10 +295,10 @@ template <class T, bool dtack_is_implicit, bool signal_will_perform> void Proces
} }
#ifdef LOG_TRACE #ifdef LOG_TRACE
// const uint32_t fetched_pc = (program_counter_.full - 4)&0xffffff; const uint32_t fetched_pc = (program_counter_.full - 4)&0xffffff;
// should_log |= fetched_pc == 0x401142; should_log |= fetched_pc == 0x4012A2;
// should_log &= fetched_pc != 0x4011AA; should_log &= fetched_pc != 0x4012AE;
// should_log = (fetched_pc >= 0x408D66) && (fetched_pc <= 0x408D84); // should_log = (fetched_pc >= 0x408D66) && (fetched_pc <= 0x408D84);
#endif #endif

10
Processors/68000/Implementation/68000Storage.cpp
View File

@ -2449,23 +2449,22 @@ struct ProcessorStorageConstructor {
program.destination = &storage_.destination_bus_data_[0]; program.destination = &storage_.destination_bus_data_[0];
program.destination_address = &storage_.address_[7]; program.destination_address = &storage_.address_[7];
// Common to all modes: decrement A7.
op(int(Action::Decrement4) | MicroOp::DestinationMask);
const int mode = combined_mode(ea_mode, ea_register); const int mode = combined_mode(ea_mode, ea_register);
switch(mode) { switch(mode) {
default: continue; default: continue;
case Ind: // PEA (An) case Ind: // PEA (An)
operation = Operation::MOVEAl; operation = Operation::MOVEAl;
op(int(Action::Decrement4) | MicroOp::DestinationMask);
op(int(Action::CopyToEffectiveAddress) | MicroOp::DestinationMask); op(int(Action::CopyToEffectiveAddress) | MicroOp::DestinationMask);
op(Action::PerformOperation, seq("np nW+ nw", { ea(1), ea(1) })); op(Action::PerformOperation, seq("np nW+ nw", { ea(1), ea(1) }));
break; break;
case XXXl: // PEA (XXX).l case XXXl: // PEA (XXX).l
case XXXw: // PEA (XXX).w case XXXw: // PEA (XXX).w
op(int(Action::CopyToEffectiveAddress) | MicroOp::DestinationMask, (mode == XXXl) ? seq("np") : nullptr);
op(address_assemble_for_mode(mode) | MicroOp::SourceMask); op(address_assemble_for_mode(mode) | MicroOp::SourceMask);
op(int(Action::Decrement4) | MicroOp::DestinationMask);
op(int(Action::CopyToEffectiveAddress) | MicroOp::DestinationMask, (mode == XXXl) ? seq("np") : nullptr);
op(Action::PerformOperation, seq("np nW+ nw np", { ea(1), ea(1) })); op(Action::PerformOperation, seq("np nW+ nw np", { ea(1), ea(1) }));
break; break;
@ -2473,8 +2472,9 @@ struct ProcessorStorageConstructor {
case d16PC: // PEA (d16, PC) case d16PC: // PEA (d16, PC)
case d8AnXn: // PEA (d8, An, Xn) case d8AnXn: // PEA (d8, An, Xn)
case d8PCXn: // PEA (d8, PC, Xn) case d8PCXn: // PEA (d8, PC, Xn)
op(int(Action::CopyToEffectiveAddress) | MicroOp::DestinationMask);
op(calc_action_for_mode(mode) | MicroOp::SourceMask, seq(pseq("np", mode))); op(calc_action_for_mode(mode) | MicroOp::SourceMask, seq(pseq("np", mode)));
op(int(Action::Decrement4) | MicroOp::DestinationMask);
op(int(Action::CopyToEffectiveAddress) | MicroOp::DestinationMask);
op(Action::PerformOperation, seq(pseq("np nW+ nw", mode), { ea(1), ea(1) })); op(Action::PerformOperation, seq(pseq("np nW+ nw", mode), { ea(1), ea(1) }));
break; break;
} }