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https://github.com/TomHarte/CLK.git
synced 2024-11-22 12:33:29 +00:00
Reduces output noise.
This commit is contained in:
parent
f53411a319
commit
8d4a96683a
@ -23,7 +23,7 @@ NCR5380::NCR5380(SCSI::Bus &bus, int clock_rate) :
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void NCR5380::write(int address, uint8_t value, bool dma_acknowledge) {
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void NCR5380::write(int address, uint8_t value, bool dma_acknowledge) {
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switch(address & 7) {
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switch(address & 7) {
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case 0:
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case 0:
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LOG("[SCSI 0] Set current SCSI bus state to " << PADHEX(2) << int(value));
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// LOG("[SCSI 0] Set current SCSI bus state to " << PADHEX(2) << int(value));
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data_bus_ = value;
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data_bus_ = value;
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if(dma_request_ && dma_operation_ == DMAOperation::Send) {
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if(dma_request_ && dma_operation_ == DMAOperation::Send) {
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@ -36,7 +36,7 @@ void NCR5380::write(int address, uint8_t value, bool dma_acknowledge) {
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break;
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break;
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case 1: {
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case 1: {
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LOG("[SCSI 1] Initiator command register set: " << PADHEX(2) << int(value));
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// LOG("[SCSI 1] Initiator command register set: " << PADHEX(2) << int(value));
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initiator_command_ = value;
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initiator_command_ = value;
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bus_output_ &= ~(Line::Reset | Line::Acknowledge | Line::Busy | Line::SelectTarget | Line::Attention);
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bus_output_ &= ~(Line::Reset | Line::Acknowledge | Line::Busy | Line::SelectTarget | Line::Attention);
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@ -52,7 +52,7 @@ void NCR5380::write(int address, uint8_t value, bool dma_acknowledge) {
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} break;
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} break;
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case 2:
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case 2:
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LOG("[SCSI 2] Set mode: " << PADHEX(2) << int(value));
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// LOG("[SCSI 2] Set mode: " << PADHEX(2) << int(value));
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mode_ = value;
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mode_ = value;
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// bit 7: 1 = use block mode DMA mode (if DMA mode is also enabled)
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// bit 7: 1 = use block mode DMA mode (if DMA mode is also enabled)
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@ -87,27 +87,27 @@ void NCR5380::write(int address, uint8_t value, bool dma_acknowledge) {
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break;
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break;
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case 3: {
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case 3: {
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LOG("[SCSI 3] Set target command: " << PADHEX(2) << int(value));
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// LOG("[SCSI 3] Set target command: " << PADHEX(2) << int(value));
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target_command_ = value;
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target_command_ = value;
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update_control_output();
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update_control_output();
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} break;
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} break;
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case 4:
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case 4:
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LOG("[SCSI 4] Set select enabled: " << PADHEX(2) << int(value));
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// LOG("[SCSI 4] Set select enabled: " << PADHEX(2) << int(value));
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break;
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break;
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case 5:
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case 5:
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LOG("[SCSI 5] Start DMA send: " << PADHEX(2) << int(value));
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// LOG("[SCSI 5] Start DMA send: " << PADHEX(2) << int(value));
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dma_operation_ = DMAOperation::Send;
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dma_operation_ = DMAOperation::Send;
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break;
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break;
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case 6:
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case 6:
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LOG("[SCSI 6] Start DMA target receive: " << PADHEX(2) << int(value));
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// LOG("[SCSI 6] Start DMA target receive: " << PADHEX(2) << int(value));
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dma_operation_ = DMAOperation::TargetReceive;
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dma_operation_ = DMAOperation::TargetReceive;
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break;
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break;
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case 7:
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case 7:
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LOG("[SCSI 7] Start DMA initiator receive: " << PADHEX(2) << int(value));
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// LOG("[SCSI 7] Start DMA initiator receive: " << PADHEX(2) << int(value));
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dma_operation_ = DMAOperation::InitiatorReceive;
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dma_operation_ = DMAOperation::InitiatorReceive;
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break;
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break;
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}
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}
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@ -131,7 +131,7 @@ void NCR5380::write(int address, uint8_t value, bool dma_acknowledge) {
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uint8_t NCR5380::read(int address, bool dma_acknowledge) {
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uint8_t NCR5380::read(int address, bool dma_acknowledge) {
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switch(address & 7) {
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switch(address & 7) {
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case 0:
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case 0:
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LOG("[SCSI 0] Get current SCSI bus state: " << PADHEX(2) << (bus_.get_state() & 0xff));
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// LOG("[SCSI 0] Get current SCSI bus state: " << PADHEX(2) << (bus_.get_state() & 0xff));
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if(dma_request_ && dma_operation_ == DMAOperation::InitiatorReceive) {
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if(dma_request_ && dma_operation_ == DMAOperation::InitiatorReceive) {
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dma_acknowledge_ = true;
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dma_acknowledge_ = true;
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@ -142,7 +142,7 @@ uint8_t NCR5380::read(int address, bool dma_acknowledge) {
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return uint8_t(bus_.get_state());
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return uint8_t(bus_.get_state());
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case 1:
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case 1:
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LOG("[SCSI 1] Initiator command register get: " << (arbitration_in_progress_ ? 'p' : '-') << (lost_arbitration_ ? 'l' : '-'));
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// LOG("[SCSI 1] Initiator command register get: " << (arbitration_in_progress_ ? 'p' : '-') << (lost_arbitration_ ? 'l' : '-'));
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return
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return
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// Bits repeated as they were set.
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// Bits repeated as they were set.
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(initiator_command_ & ~0x60) |
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(initiator_command_ & ~0x60) |
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@ -154,11 +154,11 @@ uint8_t NCR5380::read(int address, bool dma_acknowledge) {
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(lost_arbitration_ ? 0x20 : 0x00);
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(lost_arbitration_ ? 0x20 : 0x00);
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case 2:
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case 2:
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LOG("[SCSI 2] Get mode");
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// LOG("[SCSI 2] Get mode");
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return mode_;
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return mode_;
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case 3:
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case 3:
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LOG("[SCSI 3] Get target command");
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// LOG("[SCSI 3] Get target command");
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return target_command_;
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return target_command_;
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case 4: {
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case 4: {
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@ -172,7 +172,7 @@ uint8_t NCR5380::read(int address, bool dma_acknowledge) {
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((bus_state & Line::Input) ? 0x04 : 0x00) |
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((bus_state & Line::Input) ? 0x04 : 0x00) |
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((bus_state & Line::SelectTarget) ? 0x02 : 0x00) |
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((bus_state & Line::SelectTarget) ? 0x02 : 0x00) |
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((bus_state & Line::Parity) ? 0x01 : 0x00);
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((bus_state & Line::Parity) ? 0x01 : 0x00);
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LOG("[SCSI 4] Get current bus state: " << PADHEX(2) << int(result));
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// LOG("[SCSI 4] Get current bus state: " << PADHEX(2) << int(result));
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return result;
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return result;
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}
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}
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@ -191,16 +191,16 @@ uint8_t NCR5380::read(int address, bool dma_acknowledge) {
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/* b2 = busy error */
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/* b2 = busy error */
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((bus_state & Line::Attention) ? 0x02 : 0x00) |
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((bus_state & Line::Attention) ? 0x02 : 0x00) |
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((bus_state & Line::Acknowledge) ? 0x01 : 0x00);
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((bus_state & Line::Acknowledge) ? 0x01 : 0x00);
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LOG("[SCSI 5] Get bus and status: " << PADHEX(2) << int(result));
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// LOG("[SCSI 5] Get bus and status: " << PADHEX(2) << int(result));
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return result;
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return result;
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}
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}
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case 6:
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case 6:
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LOG("[SCSI 6] Get input data");
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// LOG("[SCSI 6] Get input data");
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return 0xff;
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return 0xff;
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case 7:
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case 7:
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LOG("[SCSI 7] Reset parity/interrupt");
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// LOG("[SCSI 7] Reset parity/interrupt");
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return 0xff;
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return 0xff;
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}
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}
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return 0;
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return 0;
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@ -7,10 +7,10 @@
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//
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//
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#include "DirectAccessDevice.hpp"
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#include "DirectAccessDevice.hpp"
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#include "../../../Outputs/Log.hpp"
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using namespace SCSI;
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using namespace SCSI;
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void DirectAccessDevice::set_storage(const std::shared_ptr<Storage::MassStorage::MassStorageDevice> &device) {
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void DirectAccessDevice::set_storage(const std::shared_ptr<Storage::MassStorage::MassStorageDevice> &device) {
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device_ = device;
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device_ = device;
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}
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}
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@ -19,7 +19,7 @@ bool DirectAccessDevice::read(const Target::CommandState &state, Target::Respond
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if(!device_) return false;
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if(!device_) return false;
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const auto specs = state.read_write_specs();
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const auto specs = state.read_write_specs();
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printf("Read: %d from %d\n", specs.number_of_blocks, specs.address);
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LOG("Read: " << specs.number_of_blocks << " from " << specs.address);
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std::vector<uint8_t> output = device_->get_block(specs.address);
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std::vector<uint8_t> output = device_->get_block(specs.address);
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for(uint32_t offset = 1; offset < specs.number_of_blocks; ++offset) {
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for(uint32_t offset = 1; offset < specs.number_of_blocks; ++offset) {
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@ -10,6 +10,7 @@
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#define SCSI_Target_hpp
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#define SCSI_Target_hpp
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#include "SCSI.hpp"
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#include "SCSI.hpp"
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#include "../../../Outputs/Log.hpp"
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#include <cstring>
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#include <cstring>
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#include <functional>
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#include <functional>
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@ -125,7 +125,6 @@ template <typename Executor> void Target<Executor>::scsi_bus_did_change(Bus *, B
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bus_state_ &= ~(Line::Request | 0xff);
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bus_state_ &= ~(Line::Request | 0xff);
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++data_pointer_;
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++data_pointer_;
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// printf("DP: %zu\n", data_pointer_);
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break;
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break;
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case 0:
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case 0:
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@ -177,7 +176,7 @@ template <typename Executor> bool Target<Executor>::dispatch_command() {
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#define G1(x) (0x20|x)
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#define G1(x) (0x20|x)
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#define G5(x) (0xa0|x)
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#define G5(x) (0xa0|x)
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printf("---Command %02x---\n", command_[0]);
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LOG("---Command " << PADHEX(2) << int(command_[0]) << "---");
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switch(command_[0]) {
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switch(command_[0]) {
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default: return false;
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default: return false;
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@ -277,5 +276,5 @@ template <typename Executor> void Target<Executor>::end_command() {
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bus_state_ = DefaultBusState;
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bus_state_ = DefaultBusState;
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set_device_output(bus_state_);
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set_device_output(bus_state_);
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printf("---Done---\n");
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LOG("---Done---");
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}
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}
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