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mirror of https://github.com/TomHarte/CLK.git synced 2024-10-02 19:54:35 +00:00

Makes corrections to ix addressing mode and shift/roll flags.

This commit is contained in:
Thomas Harte 2020-10-09 23:12:20 -04:00
parent 776f014dbe
commit 92e72959c3
2 changed files with 11 additions and 4 deletions

View File

@ -182,6 +182,7 @@ template <typename BusHandler> void Processor<BusHandler>::run_for(const Cycles
case OperationCopyDataToInstruction:
instruction_buffer_ = data_buffer_;
data_buffer_.clear();
continue;
case OperationCopyAToData:
@ -672,26 +673,26 @@ template <typename BusHandler> void Processor<BusHandler>::run_for(const Cycles
case ASL:
flags_.carry = data_buffer_.value >> (7 + m_shift_);
data_buffer_.value <<= 1;
flags_.set_nz(instruction_buffer_.value, m_shift_);
flags_.set_nz(data_buffer_.value, m_shift_);
break;
case LSR:
flags_.carry = data_buffer_.value & 1;
data_buffer_.value >>= 1;
flags_.set_nz(instruction_buffer_.value, m_shift_);
flags_.set_nz(data_buffer_.value, m_shift_);
break;
case ROL:
data_buffer_.value = (data_buffer_.value << 1) | flags_.carry;
flags_.carry = data_buffer_.value >> (7 + m_shift_);
flags_.set_nz(instruction_buffer_.value, m_shift_);
flags_.set_nz(data_buffer_.value, m_shift_);
break;
case ROR: {
const uint8_t next_carry = data_buffer_.value & 1;
data_buffer_.value = (data_buffer_.value >> 1) | (flags_.carry << (7 + m_shift_));
flags_.carry = next_carry;
flags_.set_nz(instruction_buffer_.value, m_shift_);
flags_.set_nz(data_buffer_.value, m_shift_);
} break;
//

View File

@ -405,6 +405,12 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
target(CycleFetchPCThrowaway); // IO.
target(CycleFetchIncrementData); // AAL
target(CycleFetchData); // AAH
target(OperationCopyDataToInstruction);
target(OperationConstructAbsolute);
read_write(type, is8bit, target);
}