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https://github.com/TomHarte/CLK.git
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Take a stab at index-hole sync.
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eb157f15f3
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@ -930,6 +930,7 @@ bool Chipset::DiskDMA::advance() {
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if(!write_) {
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if(!write_) {
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// TODO: run an actual PLL, collect actual disk data.
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// TODO: run an actual PLL, collect actual disk data.
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if(length_ && buffer_read_ != buffer_write_) {
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if(length_ && buffer_read_ != buffer_write_) {
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printf("Deposited %04x\n", buffer_[buffer_read_ & 3]);
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ram_[pointer_[0] & ram_mask_] = buffer_[buffer_read_ & 3];
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ram_[pointer_[0] & ram_mask_] = buffer_[buffer_read_ & 3];
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++pointer_[0];
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++pointer_[0];
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--length_;
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--length_;
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@ -1103,6 +1104,9 @@ void Chipset::DiskController::process_index_hole() {
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// TODO: rectify once drives do an actual index pulse, with length.
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// TODO: rectify once drives do an actual index pulse, with length.
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cia_.set_flag_input(true);
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cia_.set_flag_input(true);
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cia_.set_flag_input(false);
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cia_.set_flag_input(false);
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// Resync word output. Experimental!!
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bit_count_ = 0;
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}
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}
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void Chipset::DiskController::set_mtr_sel_side_dir_step(uint8_t value) {
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void Chipset::DiskController::set_mtr_sel_side_dir_step(uint8_t value) {
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