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Excludes DBcc from standard operand fetch.

This commit is contained in:
Thomas Harte 2022-05-21 19:53:28 -04:00
parent 3811ab1b82
commit 94288d5a94
2 changed files with 24 additions and 22 deletions

View File

@ -156,30 +156,30 @@ struct TestProcessor: public CPU::MC68000Mk2::BusHandler {
// To limit tests run to a subset of files and/or of tests, uncomment and fill in below. // To limit tests run to a subset of files and/or of tests, uncomment and fill in below.
_fileSet = [NSSet setWithArray:@[ _fileSet = [NSSet setWithArray:@[
@"divu_divs.json", // @"divu_divs.json",
// Below this line are passing tests. // Below this line are passing tests.
@"abcd_sbcd.json", // @"abcd_sbcd.json",
@"add_sub.json", // @"add_sub.json",
@"addi_subi_cmpi.json", // @"addi_subi_cmpi.json",
@"addq_subq.json", // @"addq_subq.json",
@"addx_subx.json", // @"addx_subx.json",
@"bcc.json", // @"bcc.json",
@"btst_bchg_bclr_bset.json", // @"btst_bchg_bclr_bset.json",
@"chk.json", // @"chk.json",
@"cmp.json", // @"cmp.json",
@"dbcc_scc.json", @"dbcc_scc.json",
@"eor_and_or.json", // @"eor_and_or.json",
@"eori_andi_ori.json", // @"eori_andi_ori.json",
@"ext.json", // @"ext.json",
@"jsr.json", // @"jsr.json",
@"movem.json", // @"movem.json",
@"movep.json", // @"movep.json",
@"nbcd.json", // @"nbcd.json",
@"ext.json", // @"ext.json",
@"swap.json", // @"swap.json",
]]; // 19/32 = 59 % done, as far as the tests go. ]]; // 19/32 = 59 % done, as far as the tests go.
// _testSet = [NSSet setWithArray:@[@"DIVU 80ec"]]; _testSet = [NSSet setWithArray:@[@"DBcc 0051"]];
} }
- (void)testAll { - (void)testAll {

View File

@ -590,7 +590,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
} }
}); });
StdCASE(DBcc, perform_state_ = DBcc); StdCASE(DBcc, MoveToState(DBcc));
StdCASE(Bccb, perform_state_ = Bcc); StdCASE(Bccb, perform_state_ = Bcc);
StdCASE(Bccw, perform_state_ = Bcc); StdCASE(Bccw, perform_state_ = Bcc);
@ -1405,6 +1405,8 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
// DBcc // DBcc
// //
BeginState(DBcc): BeginState(DBcc):
operand_[0].w = uint32_t(int16_t(prefetch_.w));
InstructionSet::M68k::perform< InstructionSet::M68k::perform<
InstructionSet::M68k::Model::M68000, InstructionSet::M68k::Model::M68000,
ProcessorBase, ProcessorBase,
@ -1436,7 +1438,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
// Yacht lists an extra np here; I'm assuming it's a read from where // Yacht lists an extra np here; I'm assuming it's a read from where
// the PC would have gone, had the branch been taken. So do that, // the PC would have gone, had the branch been taken. So do that,
// but then reset the PC to where it would have been. // but then reset the PC to where it would have been.
Prefetch(); Prefetch(); // np
program_counter_.l = instruction_address_.l + 4; program_counter_.l = instruction_address_.l + 4;
Prefetch(); // np Prefetch(); // np