1
0
mirror of https://github.com/TomHarte/CLK.git synced 2024-11-26 08:49:37 +00:00

Take another run at IO addresses.

This commit is contained in:
Thomas Harte 2022-06-22 15:28:11 -04:00
parent 76767110b7
commit 944e5ebbfa

View File

@ -387,7 +387,7 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
// 8. Accumulator; A. // 8. Accumulator; A.
static void accumulator(AccessType, bool, const std::function<void(MicroOp)> &target) { static void accumulator(AccessType, bool, const std::function<void(MicroOp)> &target) {
target(CycleFetchPreviousPCThrowaway); // IO. target(CycleFetchPCThrowaway); // IO.
// TODO: seriously consider a-specific versions of all relevant operations; // TODO: seriously consider a-specific versions of all relevant operations;
// the cost of interpreting three things here is kind of silly. // the cost of interpreting three things here is kind of silly.
@ -569,14 +569,14 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
// 19a. Implied; i. // 19a. Implied; i.
static void implied(AccessType, bool, const std::function<void(MicroOp)> &target) { static void implied(AccessType, bool, const std::function<void(MicroOp)> &target) {
target(CycleFetchPreviousPCThrowaway); // IO. target(CycleFetchPCThrowaway); // IO.
target(OperationPerform); target(OperationPerform);
} }
// 19b. Implied; i; XBA. // 19b. Implied; i; XBA.
static void implied_xba(AccessType, bool, const std::function<void(MicroOp)> &target) { static void implied_xba(AccessType, bool, const std::function<void(MicroOp)> &target) {
target(CycleFetchPreviousPCThrowaway); // IO. target(CycleFetchPCThrowaway); // IO.
target(CycleFetchPreviousPCThrowaway); // IO. target(CycleFetchPCThrowaway); // IO.
target(OperationPerform); target(OperationPerform);
} }
@ -584,8 +584,8 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
// 19d. Wait for interrupt. // 19d. Wait for interrupt.
static void stp_wai(AccessType, bool, const std::function<void(MicroOp)> &target) { static void stp_wai(AccessType, bool, const std::function<void(MicroOp)> &target) {
target(OperationPerform); // Establishes the termination condition. target(OperationPerform); // Establishes the termination condition.
target(CycleFetchPreviousPCThrowaway); // IO. target(CycleFetchPCThrowaway); // IO.
target(CycleFetchPreviousPCThrowaway); // IO. target(CycleFetchPCThrowaway); // IO.
target(CycleRepeatingNone); // This will first check whether the STP/WAI exit target(CycleRepeatingNone); // This will first check whether the STP/WAI exit
// condition has occurred; if not then it'll issue // condition has occurred; if not then it'll issue
// either a BusOperation::None or ::Ready and then // either a BusOperation::None or ::Ready and then
@ -654,8 +654,8 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
// 22b. Stack; s, PLx. // 22b. Stack; s, PLx.
static void stack_pull(AccessType, bool is8bit, const std::function<void(MicroOp)> &target) { static void stack_pull(AccessType, bool is8bit, const std::function<void(MicroOp)> &target) {
target(CycleFetchPreviousPCThrowaway); // IO. target(CycleFetchPCThrowaway); // IO.
target(CycleFetchPreviousPCThrowaway); // IO. target(CycleFetchPCThrowaway); // IO.
if(!is8bit) target(CyclePull); // REG low. if(!is8bit) target(CyclePull); // REG low.
target(CyclePull); // REG [high]. target(CyclePull); // REG [high].
@ -665,7 +665,7 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
// 22c. Stack; s, PHx. // 22c. Stack; s, PHx.
static void stack_push(AccessType, bool is8bit, const std::function<void(MicroOp)> &target) { static void stack_push(AccessType, bool is8bit, const std::function<void(MicroOp)> &target) {
target(CycleFetchPreviousPCThrowaway); // IO. target(CycleFetchPCThrowaway); // IO.
target(OperationPerform); target(OperationPerform);
@ -711,8 +711,8 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
// 22g. Stack; s, RTI. // 22g. Stack; s, RTI.
static void stack_rti(AccessType, bool, const std::function<void(MicroOp)> &target) { static void stack_rti(AccessType, bool, const std::function<void(MicroOp)> &target) {
target(CycleFetchPreviousPCThrowaway); // IO. target(CycleFetchPCThrowaway); // IO.
target(CycleFetchPreviousPCThrowaway); // IO. target(CycleFetchPCThrowaway); // IO.
target(CyclePull); // P. target(CyclePull); // P.
target(CyclePull); // New PCL. target(CyclePull); // New PCL.
@ -724,8 +724,8 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
// 22h. Stack; s, RTS. // 22h. Stack; s, RTS.
static void stack_rts(AccessType, bool, const std::function<void(MicroOp)> &target) { static void stack_rts(AccessType, bool, const std::function<void(MicroOp)> &target) {
target(CycleFetchPreviousPCThrowaway); // IO. target(CycleFetchPCThrowaway); // IO.
target(CycleFetchPreviousPCThrowaway); // IO. target(CycleFetchPCThrowaway); // IO.
target(CyclePull); // PCL. target(CyclePull); // PCL.
target(CyclePull); // PCH. target(CyclePull); // PCH.
@ -736,8 +736,8 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
// 22i. Stack; s, RTL. // 22i. Stack; s, RTL.
static void stack_rtl(AccessType, bool, const std::function<void(MicroOp)> &target) { static void stack_rtl(AccessType, bool, const std::function<void(MicroOp)> &target) {
target(CycleFetchIncrementPC); // IO. target(CycleFetchPCThrowaway); // IO.
target(CycleFetchIncrementPC); // IO. target(CycleFetchPCThrowaway); // IO.
target(CyclePull); // New PCL. target(CyclePull); // New PCL.
target(CyclePull); // New PCH. target(CyclePull); // New PCH.