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Takes a run at divide-by-zero exceptions and starts looking towards ways to improve startup time.
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@ -779,8 +779,10 @@ template <class T, bool dtack_is_implicit, bool signal_will_perform> void Proces
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case Operation::DIVU: {
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// An attempt to divide by zero schedules an exception.
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if(!active_program_->source->halves.low.full) {
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// TODO: schedule an exception.
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assert(false);
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// Schedule a divide-by-zero exception.
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active_program_ = nullptr;
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active_micro_op_ = exception_micro_ops_;
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populate_trap_steps(5, get_status());
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break;
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}
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@ -838,8 +840,10 @@ template <class T, bool dtack_is_implicit, bool signal_will_perform> void Proces
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case Operation::DIVS: {
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// An attempt to divide by zero schedules an exception.
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if(!active_program_->source->halves.low.full) {
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// TODO: schedule an exception.
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assert(false);
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// Schedule a divide-by-zero exception.
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active_program_ = nullptr;
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active_micro_op_ = exception_micro_ops_;
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populate_trap_steps(5, get_status());
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break;
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}
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@ -1073,8 +1077,8 @@ template <class T, bool dtack_is_implicit, bool signal_will_perform> void Proces
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case Operation::TRAP: {
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// Select the trap steps as next; the initial microcycle should be 4 cycles long.
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bus_program = trap_steps_;
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bus_program->microcycle.length = HalfCycles(8);
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populate_trap_steps((decoded_instruction_ & 15) + 32, get_status());
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bus_program->microcycle.length = HalfCycles(8);
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// The program counter to push is actually one slot ago.
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program_counter_.full -= 2;
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@ -1084,8 +1088,8 @@ template <class T, bool dtack_is_implicit, bool signal_will_perform> void Proces
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if(overflow_flag_) {
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// Select the trap steps as next; the initial microcycle should be 4 cycles long.
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bus_program = trap_steps_;
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bus_program->microcycle.length = HalfCycles(0);
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populate_trap_steps(7, get_status());
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bus_program->microcycle.length = HalfCycles(0);
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program_counter_.full -= 4;
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}
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} break;
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@ -1100,12 +1104,12 @@ template <class T, bool dtack_is_implicit, bool signal_will_perform> void Proces
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negative_flag_ = is_under ? 1 : 0;
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bus_program = trap_steps_;
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populate_trap_steps(6, get_status());
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if(is_under) {
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bus_program->microcycle.length = HalfCycles(16);
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} else {
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bus_program->microcycle.length = HalfCycles(8);
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}
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populate_trap_steps(6, get_status());
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// The program counter to push is two slots ago as whatever was the correct prefetch
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// to continue without an exception has already happened, just in case.
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@ -10,6 +10,7 @@
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#include <algorithm>
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#include <sstream>
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#include <map>
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namespace CPU {
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namespace MC68000 {
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@ -364,9 +365,33 @@ struct ProcessorStorageConstructor {
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return size_t(position - storage_.all_bus_steps_.begin());
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}
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/*
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// If the new steps already exist, just return the existing index to them;
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// otherwise insert them. A lookup table of steps to start positions within
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// all_bus_steps_ is maintained to shorten setup time here
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auto potential_locations = locations_by_bus_step_[steps.front()];
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for(auto index: potential_locations) {
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if(index + steps.size() >= storage_.all_bus_steps_.size()) continue;
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if(std::equal(
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storage_.all_bus_steps_.begin() + ssize_t(index),
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storage_.all_bus_steps_.begin() + ssize_t(index + steps.size()),
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steps.begin())) {
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return index;
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}
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}
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// Copy to the end, and update potential_locations.
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const auto start = storage_.all_bus_steps_.size();
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std::copy(steps.begin(), steps.end(), std::back_inserter(storage_.all_bus_steps_));
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auto index = start;
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for(const auto &step: steps) {
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locations_by_bus_step_[step].push_back(index);
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++index;
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}
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return start;
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*/
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}
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/*!
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@ -3466,10 +3491,29 @@ struct ProcessorStorageConstructor {
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}
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}
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}
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printf("%lu total steps\n", storage_.all_bus_steps_.size());
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}
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private:
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ProcessorStorage &storage_;
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/* struct BusStepOrderer {
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bool operator()( BusStep const& lhs, BusStep const& rhs ) const {
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int action_diff = int(lhs.action) - int(rhs.action);
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if(action_diff < 0) {
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return true;
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}
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if(action_diff > 0) {
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return false;
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}
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return
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std::make_tuple(lhs.microcycle.value, lhs.microcycle.address, lhs.microcycle.length, lhs.microcycle.operation) <
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std::make_tuple(rhs.microcycle.value, rhs.microcycle.address, rhs.microcycle.length, rhs.microcycle.operation);
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}
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};
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std::map<BusStep, std::vector<size_t>, BusStepOrderer> locations_by_bus_step_;*/
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};
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}
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@ -3514,7 +3558,9 @@ CPU::MC68000::ProcessorStorage::ProcessorStorage() {
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all_micro_ops_.emplace_back();
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// Install operations.
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const std::clock_t start = std::clock();
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constructor.install_instructions();
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std::cout << "Construction took " << double(std::clock() - start) / double(CLOCKS_PER_SEC / 1000) << "ms" << std::endl;
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// Realise the special programs as direct pointers.
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reset_bus_steps_ = &all_bus_steps_[reset_offset];
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@ -421,6 +421,9 @@ class ProcessorStorage {
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precomputed_addresses_[1] = address_[7].full - 6;
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precomputed_addresses_[2] = address_[7].full - 4;
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address_[7].full -= 6;
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// Set the default timing.
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trap_steps_->microcycle.length = HalfCycles(8);
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}
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