diff --git a/Machines/Amiga/Amiga.cpp b/Machines/Amiga/Amiga.cpp index 1d60034cf..0e49deac2 100644 --- a/Machines/Amiga/Amiga.cpp +++ b/Machines/Amiga/Amiga.cpp @@ -11,7 +11,7 @@ #include "../../Activity/Source.hpp" #include "../MachineTypes.hpp" -#include "../../Processors/68000/68000.hpp" +#include "../../Processors/68000Mk2/68000Mk2.hpp" #include "../../Analyser/Static/Amiga/Target.hpp" @@ -41,7 +41,7 @@ namespace Amiga { class ConcreteMachine: public Activity::Source, - public CPU::MC68000::BusHandler, + public CPU::MC68000Mk2::BusHandler, public MachineTypes::AudioProducer, public MachineTypes::JoystickMachine, public MachineTypes::MappedKeyboardMachine, @@ -80,8 +80,7 @@ class ConcreteMachine: } // MARK: - MC68000::BusHandler. - using Microcycle = CPU::MC68000::Microcycle; - HalfCycles perform_bus_operation(const CPU::MC68000::Microcycle &cycle, int) { + template HalfCycles perform_bus_operation(const Microcycle &cycle, int) { // Do a quick advance check for Chip RAM access; add a suitable delay if required. HalfCycles total_length; @@ -182,7 +181,7 @@ class ConcreteMachine: } private: - CPU::MC68000::Processor mc68000_; + CPU::MC68000Mk2::Processor mc68000_; // MARK: - Memory map. @@ -218,6 +217,7 @@ class ConcreteMachine: void run_for(const Cycles cycles) { mc68000_.run_for(cycles); + flush(); } // MARK: - MachineTypes::MouseMachine. diff --git a/Machines/Amiga/Chipset.cpp b/Machines/Amiga/Chipset.cpp index a816aa207..d038b32e8 100644 --- a/Machines/Amiga/Chipset.cpp +++ b/Machines/Amiga/Chipset.cpp @@ -817,8 +817,8 @@ void Chipset::update_interrupts() { } } -void Chipset::perform(const CPU::MC68000::Microcycle &cycle) { - using Microcycle = CPU::MC68000::Microcycle; +void Chipset::perform(const CPU::MC68000Mk2::Microcycle &cycle) { + using Microcycle = CPU::MC68000Mk2::Microcycle; const uint32_t register_address = *cycle.address & ChipsetAddressMask; if(cycle.operation & Microcycle::Read) { diff --git a/Machines/Amiga/Chipset.hpp b/Machines/Amiga/Chipset.hpp index 15f151c42..f74a2b4a7 100644 --- a/Machines/Amiga/Chipset.hpp +++ b/Machines/Amiga/Chipset.hpp @@ -20,7 +20,7 @@ #include "../../ClockReceiver/JustInTime.hpp" #include "../../Components/6526/6526.hpp" #include "../../Outputs/CRT/CRT.hpp" -#include "../../Processors/68000/68000.hpp" +#include "../../Processors/68000Mk2/68000Mk2.hpp" #include "../../Storage/Disk/Controller/DiskController.hpp" #include "../../Storage/Disk/Drive.hpp" @@ -58,7 +58,7 @@ class Chipset: private ClockingHint::Observer { Changes run_until_after_cpu_slot(); /// Performs the provided microcycle, which the caller guarantees to be a memory access. - void perform(const CPU::MC68000::Microcycle &); + void perform(const CPU::MC68000Mk2::Microcycle &); /// Sets the current state of the CIA interrupt lines. void set_cia_interrupts(bool cia_a, bool cia_b); diff --git a/Machines/Amiga/MemoryMap.hpp b/Machines/Amiga/MemoryMap.hpp index 9e6c8fdf1..fbe920027 100644 --- a/Machines/Amiga/MemoryMap.hpp +++ b/Machines/Amiga/MemoryMap.hpp @@ -19,8 +19,8 @@ namespace Amiga { class MemoryMap { private: - static constexpr auto PermitRead = CPU::MC68000::Microcycle::PermitRead; - static constexpr auto PermitWrite = CPU::MC68000::Microcycle::PermitWrite; + static constexpr auto PermitRead = CPU::MC68000Mk2::Microcycle::PermitRead; + static constexpr auto PermitWrite = CPU::MC68000Mk2::Microcycle::PermitWrite; static constexpr auto PermitReadWrite = PermitRead | PermitWrite; public: @@ -109,12 +109,12 @@ class MemoryMap { /// Performs the provided microcycle, which the caller guarantees to be a memory access, /// and in the Zorro register range. - bool perform(const CPU::MC68000::Microcycle &cycle) { + bool perform(const CPU::MC68000Mk2::Microcycle &cycle) { if(!fast_autoconf_visible_) return false; const uint32_t register_address = *cycle.address & 0xfe; - using Microcycle = CPU::MC68000::Microcycle; + using Microcycle = CPU::MC68000Mk2::Microcycle; if(cycle.operation & Microcycle::Read) { // Re: Autoconf: //