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mirror of https://github.com/TomHarte/CLK.git synced 2024-11-28 21:49:27 +00:00

Switch to actual mnenomics, temporarily(?) shrink table.

This commit is contained in:
Thomas Harte 2024-02-17 15:41:57 -05:00
parent 4c53414cc3
commit 9a74ab6a8e
2 changed files with 27 additions and 21 deletions

View File

@ -16,25 +16,25 @@
namespace InstructionSet::ARM { namespace InstructionSet::ARM {
template <Model model> template <Model model>
constexpr std::array<Operation, 256> operation_table() { using OperationTable = std::array<Operation, 128>;
std::array<Operation, 256> result{};
for(int c = 0; c < 256; c++) { template <Model model>
const uint32_t opcode = c << 20; constexpr OperationTable<model> operation_table() {
OperationTable<model> result{};
for(std::size_t c = 0; c < result.size(); c++) {
const auto opcode = static_cast<uint32_t>(c << 21);
// Cf. the ARM2 datasheet, p45. Tests below match its ordering
// other than that 'undefined' is the fallthrough case.
if(((opcode >> 26) & 0b11) == 0b00) { if(((opcode >> 26) & 0b11) == 0b00) {
result[c] = Operation((c >> 21) & 0xf); result[c] = Operation((c >> 21) & 0xf);
continue; continue;
} }
if(((opcode >> 25) & 0b111) == 0b101) {
result[c] =
((opcode >> 24) & 1) ? Operation::BranchWithLink : Operation::Branch;
continue;
}
if(((opcode >> 22) & 0b111'111) == 0b000'000) { if(((opcode >> 22) & 0b111'111) == 0b000'000) {
result[c] = result[c] =
((opcode >> 21) & 1) ? Operation::MultiplyWithAccumulate : Operation::Multiply; ((opcode >> 21) & 1) ? Operation::MLA : Operation::MUL;
continue; continue;
} }
@ -48,8 +48,14 @@ constexpr std::array<Operation, 256> operation_table() {
continue; continue;
} }
if(((opcode >> 24) & 0b1111) == 0b1111) { if(((opcode >> 25) & 0b111) == 0b101) {
result[c] = Operation::SoftwareInterrupt; result[c] =
((opcode >> 24) & 1) ? Operation::BL : Operation::B;
continue;
}
if(((opcode >> 25) & 0b111) == 0b110) {
result[c] = Operation::CoprocessorDataTransfer;
continue; continue;
} }
@ -58,8 +64,8 @@ constexpr std::array<Operation, 256> operation_table() {
continue; continue;
} }
if(((opcode >> 25) & 0b111) == 0b110) { if(((opcode >> 24) & 0b1111) == 0b1111) {
result[c] = Operation::CoprocessorDataTransfer; result[c] = Operation::SoftwareInterrupt;
continue; continue;
} }
@ -70,8 +76,8 @@ constexpr std::array<Operation, 256> operation_table() {
template <Model model> template <Model model>
constexpr Operation operation(uint32_t opcode) { constexpr Operation operation(uint32_t opcode) {
constexpr std::array<Operation, 256> operations = operation_table<model>(); constexpr OperationTable<model> operations = operation_table<model>();
return operations[(opcode >> 20) & 0xff]; return operations[(opcode >> 21) & 0x7f];
} }
} }

View File

@ -16,11 +16,11 @@ enum class Operation {
TST, TEQ, CMP, CMN, TST, TEQ, CMP, CMN,
ORR, MOV, BIC, MVN, ORR, MOV, BIC, MVN,
Branch, BranchWithLink, B, BL,
Multiply, MultiplyWithAccumulate, MUL, MLA,
SingleDataTransfer, SingleDataTransfer, // TODO: LDR or STR?
BlockDataTransfer, BlockDataTransfer, // TODO: LDM or STM?
SoftwareInterrupt, SoftwareInterrupt,
CoprocessorDataOperationOrRegisterTransfer, CoprocessorDataOperationOrRegisterTransfer,