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The address size modifier doesn't seem to affect far address sizes.

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It's meant to affect only instructions with operands that reside in memory, I think. So probably only ::DirectAddress in my nomenclature. More research to do.
This commit is contained in:
Thomas Harte 2022-03-11 12:46:07 -05:00
parent 727342134c
commit 9b4048ec6e
2 changed files with 42 additions and 2 deletions
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4
InstructionSets/x86/Decoder.cpp
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@ -84,12 +84,12 @@ std::pair<int, typename Decoder<model>::InstructionT> Decoder<model>::decode(con
phase_ = Phase::DisplacementOrOperand; \
operand_size_ = size
/// Handles far CALL and far JMP — fixed four byte operand operations.
/// Handles far CALL and far JMP — fixed four or six byte operand operations.
#define Far(op) \
operation_ = Operation::op; \
phase_ = Phase::DisplacementOrOperand; \
operand_size_ = DataSize::Word; \
displacement_size_ = data_size(address_size_)
displacement_size_ = data_size(default_address_size_)
/// Handles ENTER — a fixed three-byte operation.
#define Displacement16Operand8(op) \

40
OSBindings/Mac/Clock SignalTests/x86DecoderTests.mm
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@ -653,5 +653,45 @@ decode(const std::initializer_list<uint8_t> &stream, bool set_32_bit = false) {
test(instructions[16], Operation::NOP);
}
- (void)testAddressSizeModifier {
const auto instructions = decode<Model::i80386>({
0x67, 0xf3, 0x5d, 0x67, 0x3f, 0x67, 0x5a, 0x67, 0xea, 0x17, 0xa2, 0x38, 0x0b, 0xeb, 0xbc, 0x67,
0x4c, 0x67, 0x3a, 0x1f, 0x67, 0x00, 0x8d, 0xf9, 0x43, 0x67, 0xb1, 0x7c, 0x67, 0x88, 0xd1, 0x67,
0x31, 0xed, 0x67, 0x22, 0x00, 0x67, 0x79, 0xa7, 0x67, 0x87, 0x3c, 0x67, 0xd4, 0xa2, 0x67, 0x57,
0x67, 0x02, 0x21, 0x67, 0x48, 0x67, 0x33, 0x5d, 0xd7, 0x67, 0x3c, 0xe1, 0x67, 0x91, 0x67, 0x1b,
0x84, 0x43, 0x7f, 0x67, 0x15, 0xf6, 0x06, 0x2b, 0x6d
}, true);
XCTAssertEqual(instructions.size(), 22);
// addr16 repz pop ebp
// addr16 aas
// addr16 pop edx
// addr16 jmp 0xbceb:0xb38a217
// addr16 dec esp
// cmp bl,BYTE PTR [bx]
// add BYTE PTR
// addr16 mov cl,0x7c
// addr16 mov cl,dl
// addr16 xor ebp,ebp
// and al,BYTE PTR [bx+si]
// addr16 jns 0xffffffcf
// xchg DWORD PTR [si],edi
// addr16 aam 0xa2
// addr16 push edi
// add ah,BYTE PTR [bx+di]
// addr16 dec eax
// xor ebx,DWORD PTR
// addr16 cmp al,0xe1
// addr16 xchg ecx,eax
// sbb eax,DWORD PTR
// addr16 adc eax,0x6d2b06f6
}
@end