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IRQ and FIQ should also store PC+4.

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This commit is contained in:
Thomas Harte 2024-03-18 14:08:08 -04:00
parent 612c9ce49a
commit 9d858bc61b
2 changed files with 11 additions and 20 deletions
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20
InstructionSets/ARM/Registers.hpp
View File

@ -147,23 +147,13 @@ struct Registers {
/// Updates the program counter, interupt flags and link register if applicable to begin @c exception.
template <Exception type>
void exception() {
const auto r14 = pc_status(4);
switch(type) {
case Exception::IRQ: {
const auto r14 = pc_status(0);
set_mode(Mode::IRQ);
active_[14] = r14;
} break;
case Exception::FIQ: {
const auto r14 = pc_status(0);
set_mode(Mode::FIQ);
active_[14] = r14;
} break;
default: {
const auto r14 = pc_status(4);
set_mode(Mode::Supervisor);
active_[14] = r14;
} break;
case Exception::IRQ: set_mode(Mode::IRQ); break;
case Exception::FIQ: set_mode(Mode::FIQ); break;
default: set_mode(Mode::Supervisor); break;
}
active_[14] = r14;
interrupt_flags_ |= ConditionCode::IRQDisable;
if constexpr (type == Exception::Reset || type == Exception::FIQ) {

11
Machines/Acorn/Archimedes/Archimedes.cpp
View File

@ -773,7 +773,7 @@ struct Memory {
}
source = 0;
return true;
return false;
}
bool tick_timers() {
@ -1055,6 +1055,10 @@ class ConcreteMachine:
timer_divider_ -= run_length;
while(run_length--) {
if(executor_.pc() == 0x0207b3bc) {
printf("At %08x after last PC %08x\n", executor_.pc(), last_pc);
}
uint32_t instruction;
if(!executor_.bus.read(executor_.pc(), instruction, executor_.registers().mode(), false)) {
logger.info().append("Prefetch abort at %08x; last good was at %08x", executor_.pc(), last_pc);
@ -1069,11 +1073,8 @@ class ConcreteMachine:
static bool log = false;
// if(executor_.pc() == 0x03810398) {
// printf("");
// }
// log |= (executor_.pc() > 0x02000000 && executor_.pc() < 0x02000078);
// log |= executor_.pc() == 0x0381201c;
log |= executor_.pc() == 0x0207b3bc; //0x397af9c
// log = executor_.pc() == 0x0381202c;
// log |= (executor_.pc() > 0x03801000);
// log &= executor_.pc() != 0x03801a0c;