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Corrects interpretation of bit 3 of the state register.
And attempts to be a bit more careful with the language card in general.
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@ -21,11 +21,13 @@ namespace II {
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template <typename Machine> class LanguageCardSwitches {
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public:
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struct State {
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/// Indicates which 4kb chunk of RAM should be visible at $Dxxx if RAM is visible at all.
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/// When RAM is visible in the range $D000–$FFFF:
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/// @c true indicates that bank 1 should be used;
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/// @c false indicates bank 2.
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bool bank1 = false;
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/// @c true indicates that RAM should be readable in the range $D000–$FFFF;
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/// @c indicates ROM should be readable.
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/// @c false indicates ROM should be readable.
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bool read = false;
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/// @c true indicates that ROM is selected for 'writing' in the range $D000–$FFFF (i.e. writes are a no-op);
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@ -48,7 +50,7 @@ template <typename Machine> class LanguageCardSwitches {
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// Quotes below taken from Understanding the Apple II, p. 5-28 and 5-29.
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// "A3 controls the 4K bank selection"
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// "A3 controls the 4K bank selection"; 0 = bank 2, 1 = bank 1.
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state_.bank1 = address & 8;
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// "Access to $C080, $C083, $C084, $0087, $C088, $C08B, $C08C, or $C08F sets the READ ENABLE flip-flop"
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@ -81,7 +83,9 @@ template <typename Machine> class LanguageCardSwitches {
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void set_state(uint8_t value) {
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const auto previous_state = state_;
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state_.read = value & 0x08;
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// Bit 3: 1 => enable ROM, 0 => enable RAM.
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state_.read = !(value & 0x08);
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// Bit 2: 1 => select bank 1, 0 => select bank 2.
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state_.bank1 = value & 0x04;
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if(previous_state != state_) {
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@ -153,6 +153,7 @@ class ConcreteMachine:
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case 0xc036:
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if(is_read) {
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*value = speed_register_;
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printf("Reading speed register: %02x\n", *value);
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} else {
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memory_.set_speed_register(*value);
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speed_register_ = *value;
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@ -169,7 +170,7 @@ class ConcreteMachine:
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}
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break;
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// Various independent memory switch reads [TODO: does the IIe-style keyboard the low seven?].
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// Various independent memory switch reads [TODO: does the IIe-style keyboard provide the low seven?].
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#define SwitchRead(s) *value = memory_.s ? 0x80 : 0x00
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#define LanguageRead(s) SwitchRead(language_card_switches().state().s)
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#define AuxiliaryRead(s) SwitchRead(auxiliary_switches().switches().s)
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@ -183,6 +184,10 @@ class ConcreteMachine:
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case 0xc017: AuxiliaryRead(slot_C3_rom); break;
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case 0xc018: VideoRead(get_80_store()); break;
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// case 0xc019: VideoRead(get_is_vertical_blank(cycles_since_video_update_)); break;
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case 0xc019:
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printf("TODO: vertical blank check\n");
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*value = 0x80; // i.e. not VBL.
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break;
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case 0xc01a: VideoRead(get_text()); break;
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case 0xc01b: VideoRead(get_mixed()); break;
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case 0xc01c: VideoRead(get_page2()); break;
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@ -323,7 +328,7 @@ class ConcreteMachine:
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case 0xc049: case 0xc04a: case 0xc04b: case 0xc04c: case 0xc04d: case 0xc04e: case 0xc04f:
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case 0xc069: case 0xc06a: case 0xc06b: case 0xc06c:
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printf("Ignoring %04x\n", address_suffix);
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log = true;
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// log = true;
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break;
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// 'Test Mode', whatever that is (?)
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@ -367,6 +372,7 @@ class ConcreteMachine:
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}
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} else {
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// TODO: disk-port soft switches should be in COEx.
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// log = true;
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printf("Internal card-area access: %04x\n", address_suffix);
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if(is_read) {
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*value = rom_[rom_.size() - 65536 + address_suffix];
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@ -392,8 +398,8 @@ class ConcreteMachine:
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}
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}
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if(operation == CPU::WDC65816::BusOperation::ReadOpcode && address == 0x00fa56) {
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printf("?");
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if(operation == CPU::WDC65816::BusOperation::ReadOpcode) {
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assert(address);
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}
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// log |= (address >= 0xffa6d9) && (address < 0xffa6ec);
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if(log) {
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@ -261,8 +261,8 @@ class MemoryMap {
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// All references below are to 0xc000, 0xd000 and 0xe000 but should
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// work regardless of bank.
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// TODO: verify order of ternary here — on the plain Apple II it was arbitrary.
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uint8_t *const lower_ram_bank = ram - (language_state.bank1 ? 0x0000 : 0x1000);
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// This assumes bank 1 is the one before bank 2 when RAM is linear.
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uint8_t *const lower_ram_bank = ram - (language_state.bank1 ? 0x1000 : 0x0000);
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// Crib the ROM pointer from a page it's always visible on.
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const uint8_t *const rom = ®ions[region_map[0xffd0]].read[0xffd000] - ((bank_base << 8) + 0xd000);
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