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https://github.com/TomHarte/CLK.git
synced 2024-11-26 08:49:37 +00:00
Introduces the Mac Plus memory map.
Albeit with no SCSI support yet.
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@ -343,20 +343,47 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
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void set_rom_is_overlay(bool rom_is_overlay) {
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ROM_is_overlay_ = rom_is_overlay;
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populate_memory_map([rom_is_overlay] (std::function<void(int target, BusDevice device)> map_to) {
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// Addresses up to $80 0000 aren't affected by this bit.
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if(rom_is_overlay) {
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// Up to $60 0000 mirrors of the ROM alternate with unassigned areas every $10 0000 byes.
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for(int c = 0; c <= 0x600000; c += 0x100000) {
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map_to(c, ((c >> 20)&1) ? BusDevice::ROM : BusDevice::Unassigned);
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}
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map_to(0x800000, BusDevice::RAM);
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} else {
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map_to(0x400000, BusDevice::RAM);
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map_to(0x500000, BusDevice::ROM);
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map_to(0x800000, BusDevice::Unassigned);
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}
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});
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using Model = Analyser::Static::Macintosh::Target::Model;
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switch(model) {
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case Model::Mac128k:
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case Model::Mac512k:
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case Model::Mac512ke:
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populate_memory_map([rom_is_overlay] (std::function<void(int target, BusDevice device)> map_to) {
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// Addresses up to $80 0000 aren't affected by this bit.
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if(rom_is_overlay) {
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// Up to $60 0000 mirrors of the ROM alternate with unassigned areas every $10 0000 byes.
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for(int c = 0; c <= 0x600000; c += 0x100000) {
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map_to(c, ((c >> 20)&1) ? BusDevice::ROM : BusDevice::Unassigned);
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}
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map_to(0x800000, BusDevice::RAM);
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} else {
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map_to(0x400000, BusDevice::RAM);
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map_to(0x500000, BusDevice::ROM);
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map_to(0x800000, BusDevice::Unassigned);
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}
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});
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break;
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case Model::MacPlus:
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populate_memory_map([rom_is_overlay] (std::function<void(int target, BusDevice device)> map_to) {
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// Addresses up to $80 0000 aren't affected by this bit.
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if(rom_is_overlay) {
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map_to(0x100000, BusDevice::ROM);
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map_to(0x400000, BusDevice::Unassigned);
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map_to(0x500000, BusDevice::ROM);
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map_to(0x580000, BusDevice::Unassigned);
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map_to(0x600000, BusDevice::SCSI);
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map_to(0x800000, BusDevice::RAM);
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} else {
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map_to(0x400000, BusDevice::RAM);
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map_to(0x500000, BusDevice::ROM);
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map_to(0x580000, BusDevice::Unassigned);
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map_to(0x600000, BusDevice::SCSI);
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map_to(0x800000, BusDevice::Unassigned);
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}
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});
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break;
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}
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}
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bool video_is_outputting() {
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@ -709,9 +736,26 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
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});
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break;
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// case Model::MacPlus: {
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// int segment = 0;
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// } break;
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case Model::MacPlus:
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populate_memory_map([] (std::function<void(int target, BusDevice device)> map_to) {
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map_to(0x100000, BusDevice::ROM);
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map_to(0x400000, BusDevice::Unassigned);
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map_to(0x500000, BusDevice::ROM);
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map_to(0x580000, BusDevice::Unassigned);
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map_to(0x600000, BusDevice::SCSI);
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map_to(0x800000, BusDevice::RAM);
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map_to(0x900000, BusDevice::Unassigned);
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map_to(0xa00000, BusDevice::SCCReadResetPhase);
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map_to(0xb00000, BusDevice::Unassigned);
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map_to(0xc00000, BusDevice::SCCWrite);
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map_to(0xd00000, BusDevice::Unassigned);
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map_to(0xe00000, BusDevice::IWM);
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map_to(0xe80000, BusDevice::Unassigned);
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map_to(0xf00000, BusDevice::VIA);
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map_to(0xf80000, BusDevice::PhaseRead);
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map_to(0x1000000, BusDevice::Unassigned);
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});
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break;
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}
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}
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