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https://github.com/TomHarte/CLK.git
synced 2024-11-22 12:33:29 +00:00
Allow chip RAM size selection, while I'm here.
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1916a9b99c
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@ -17,6 +17,10 @@ namespace Static {
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namespace Amiga {
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namespace Amiga {
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struct Target: public Analyser::Static::Target, public Reflection::StructImpl<Target> {
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struct Target: public Analyser::Static::Target, public Reflection::StructImpl<Target> {
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ReflectableEnum(ChipRAM,
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FiveHundredAndTwelveKilobytes,
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OneMegabyte,
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TwoMegabytes);
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ReflectableEnum(FastRAM,
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ReflectableEnum(FastRAM,
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None,
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None,
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OneMegabyte,
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OneMegabyte,
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@ -24,12 +28,15 @@ struct Target: public Analyser::Static::Target, public Reflection::StructImpl<Ta
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FourMegabytes,
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FourMegabytes,
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EightMegabytes);
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EightMegabytes);
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FastRAM fast_ram = FastRAM::TwoMegabytes;
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ChipRAM chip_ram = ChipRAM::FiveHundredAndTwelveKilobytes;
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FastRAM fast_ram = FastRAM::EightMegabytes;
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Target() : Analyser::Static::Target(Machine::Amiga) {
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Target() : Analyser::Static::Target(Machine::Amiga) {
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if(needs_declare()) {
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if(needs_declare()) {
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DeclareField(fast_ram);
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DeclareField(fast_ram);
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DeclareField(chip_ram);
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AnnounceEnum(FastRAM);
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AnnounceEnum(FastRAM);
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AnnounceEnum(ChipRAM);
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}
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}
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}
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}
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};
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};
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@ -53,7 +53,7 @@ class ConcreteMachine:
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public:
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public:
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ConcreteMachine(const Analyser::Static::Amiga::Target &target, const ROMMachine::ROMFetcher &rom_fetcher) :
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ConcreteMachine(const Analyser::Static::Amiga::Target &target, const ROMMachine::ROMFetcher &rom_fetcher) :
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mc68000_(*this),
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mc68000_(*this),
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memory_(target.fast_ram),
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memory_(target.chip_ram, target.fast_ram),
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chipset_(memory_, PALClockRate)
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chipset_(memory_, PALClockRate)
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{
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{
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// Temporary: use a hard-coded Kickstart selection.
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// Temporary: use a hard-coded Kickstart selection.
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@ -11,6 +11,10 @@
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#include "../../Analyser/Static/Amiga/Target.hpp"
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#include "../../Analyser/Static/Amiga/Target.hpp"
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#include <array>
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#include <cassert>
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#include <vector>
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namespace Amiga {
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namespace Amiga {
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class MemoryMap {
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class MemoryMap {
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@ -20,9 +24,8 @@ class MemoryMap {
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static constexpr auto PermitReadWrite = PermitRead | PermitWrite;
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static constexpr auto PermitReadWrite = PermitRead | PermitWrite;
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public:
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public:
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// TODO: decide what of the below I want to be dynamic.
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std::array<uint8_t, 512*1024> kickstart{0xff};
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std::array<uint8_t, 512*1024> kickstart{0xff};
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std::array<uint8_t, 1024*1024> chip_ram{};
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std::vector<uint8_t> chip_ram{};
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struct MemoryRegion {
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struct MemoryRegion {
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uint8_t *contents = nullptr;
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uint8_t *contents = nullptr;
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@ -30,7 +33,8 @@ class MemoryMap {
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} regions[64]; // i.e. top six bits are used as an index.
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} regions[64]; // i.e. top six bits are used as an index.
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using FastRAM = Analyser::Static::Amiga::Target::FastRAM;
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using FastRAM = Analyser::Static::Amiga::Target::FastRAM;
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MemoryMap(FastRAM fast_ram_size) {
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using ChipRAM = Analyser::Static::Amiga::Target::ChipRAM;
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MemoryMap(ChipRAM chip_ram_size, FastRAM fast_ram_size) {
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// Address spaces that matter:
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// Address spaces that matter:
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//
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//
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// 00'0000 – 08'0000: chip RAM. [or overlayed KickStart]
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// 00'0000 – 08'0000: chip RAM. [or overlayed KickStart]
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@ -49,6 +53,19 @@ class MemoryMap {
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// fc'0000 – : 256kb Kickstart otherwise.
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// fc'0000 – : 256kb Kickstart otherwise.
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set_region(0xfc'0000, 0x1'00'0000, kickstart.data(), PermitRead);
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set_region(0xfc'0000, 0x1'00'0000, kickstart.data(), PermitRead);
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switch(chip_ram_size) {
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default:
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case ChipRAM::FiveHundredAndTwelveKilobytes:
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chip_ram.resize(512 * 1024);
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break;
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case ChipRAM::OneMegabyte:
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chip_ram.resize(1 * 1024 * 1024);
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break;
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case ChipRAM::TwoMegabytes:
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chip_ram.resize(2 * 1024 * 1024);
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break;
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}
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switch(fast_ram_size) {
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switch(fast_ram_size) {
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default:
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default:
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fast_autoconf_visible_ = false;
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fast_autoconf_visible_ = false;
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