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Seemingly navigate I2C correctly.
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Thomas Harte
parent
bd4ef5ec57
commit
a3931674dc
@ -24,7 +24,7 @@ void Bus::set_data(bool pulled) {
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bool Bus::data() {
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bool result = data_;
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if(peripheral_bits_) {
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result |= !(peripheral_response_ & 0x200);
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result |= !(peripheral_response_ & 0x80);
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}
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return result;
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}
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@ -41,34 +41,51 @@ void Bus::set_clock_data(bool clock_pulled, bool data_pulled) {
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return;
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}
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const bool prior_clock = clock_;
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const bool prior_data = data_;
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clock_ = clock_pulled;
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data_ = data_pulled;
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if(clock_) {
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if(peripheral_bits_) {
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// Trailing edge of clock => bit has been consumed.
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if(!prior_clock && clock_) {
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logger.info().append("<< %d", (peripheral_response_ >> 7) & 1);
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--peripheral_bits_;
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peripheral_response_ <<= 1;
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if(!peripheral_bits_) {
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signal(Event::FinishedOutput);
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}
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}
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return;
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}
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if(prior_data != data_) {
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if(!clock_ && prior_data != data_) {
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// Data transition outside of a clock cycle => start or stop.
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in_bit_ = false;
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if(data_) {
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// logger.info().append("S");
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logger.info().append("S");
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signal(Event::Start);
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} else {
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// logger.info().append("P");
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logger.info().append("W");
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signal(Event::Stop);
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}
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} else {
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if(peripheral_bits_) {
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--peripheral_bits_;
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peripheral_response_ <<= 1;
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}
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} else if(clock_ != prior_clock) {
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// Bits: wait until the falling edge of the cycle.
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if(!clock_) {
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// Rising edge: clock period begins.
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in_bit_ = true;
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} else if(in_bit_) {
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// Falling edge: clock period ends (assuming it began; otherwise this is prep, post-start bit).
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in_bit_ = false;
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if(data_) {
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// logger.info().append("0");
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signal(Event::Zero);
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} else {
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// logger.info().append("1");
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signal(Event::One);
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if(data_) {
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logger.info().append("0");
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signal(Event::Zero);
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} else {
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logger.info().append("1");
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signal(Event::One);
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}
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}
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}
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}
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@ -82,7 +99,7 @@ void Bus::signal(Event event) {
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const auto acknowledge = [&]() {
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// Post an acknowledgement bit.
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peripheral_response_ = 0;
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peripheral_bits_ = 2;
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peripheral_bits_ = 1;
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};
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const auto set_state = [&](State state) {
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@ -93,11 +110,10 @@ void Bus::signal(Event event) {
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const auto enqueue = [&](std::optional<uint8_t> next) {
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if(next) {
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peripheral_response_ = static_cast<uint16_t>((*next) << 1);
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peripheral_bits_ = 9;
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set_state(State::PostingByte);
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peripheral_response_ = static_cast<uint16_t>(*next);
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peripheral_bits_ = 8;
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set_state(State::AwaitingByteAcknowledge);
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} else {
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acknowledge();
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set_state(State::AwaitingAddress);
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}
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};
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@ -123,7 +139,6 @@ void Bus::signal(Event event) {
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case State::CollectingAddress:
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capture_bit();
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if(input_count_ == 8) {
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auto pair = peripherals_.find(uint8_t(input_) & 0xfe);
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if(pair != peripherals_.end()) {
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@ -132,8 +147,7 @@ void Bus::signal(Event event) {
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if(input_&1) {
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acknowledge();
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set_state(State::PostingByte);
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// enqueue(active_peripheral_->read());
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set_state(State::CompletingWriteAcknowledge);
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} else {
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acknowledge();
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set_state(State::ReceivingByte);
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@ -145,11 +159,9 @@ void Bus::signal(Event event) {
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break;
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case State::ReceivingByte:
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// Run down the clock on the acknowledge bit.
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if(peripheral_bits_) {
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if(event == Event::FinishedOutput) {
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return;
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}
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capture_bit();
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if(input_count_ == 8) {
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active_peripheral_->write(static_cast<uint8_t>(input_));
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@ -158,13 +170,24 @@ void Bus::signal(Event event) {
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}
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break;
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case State::PostingByte:
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// Finish whatever is enqueued.
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if(peripheral_bits_) {
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return;
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case State::CompletingWriteAcknowledge:
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if(event != Event::FinishedOutput) {
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break;
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}
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enqueue(active_peripheral_->read());
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break;
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case State::AwaitingByteAcknowledge:
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if(event == Event::FinishedOutput) {
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break;
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}
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if(event != Event::Zero) {
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logger.info().append("Peripheral byte not acknowledged");
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state_ = State::AwaitingAddress;
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break;
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}
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// Add a new byte (including its acknowledge bit).
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// Add a new byte if there is one.
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enqueue(active_peripheral_->read());
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break;
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}
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@ -38,6 +38,7 @@ public:
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private:
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bool data_ = false;
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bool clock_ = false;
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bool in_bit_ = false;
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std::unordered_map<int, Peripheral *> peripherals_;
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uint16_t input_ = 0xffff;
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@ -48,7 +49,7 @@ private:
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int peripheral_bits_ = 0;
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enum class Event {
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Zero, One, Start, Stop,
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Zero, One, Start, Stop, FinishedOutput,
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};
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void signal(Event);
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@ -56,7 +57,9 @@ private:
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AwaitingAddress,
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CollectingAddress,
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PostingByte,
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CompletingWriteAcknowledge,
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AwaitingByteAcknowledge,
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ReceivingByte,
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} state_ = State::AwaitingAddress;
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};
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@ -1,15 +1,16 @@
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//
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// CMOSRAM.hpp
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// Clock Signal
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// CMOSRAM.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 20/03/2024.
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// Copyright © 2024 Thomas Harte. All rights reserved.
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// Created by Thomas Harte on 20/03/2024.
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// Copyright © 2024 Thomas Harte. All rights reserved.
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//
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#pragma once
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#include "../../../Components/I2C/I2C.hpp"
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namespace Archimedes {
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struct CMOSRAM: public I2C::Peripheral {
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@ -18,16 +19,40 @@ struct CMOSRAM: public I2C::Peripheral {
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}
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std::optional<uint8_t> read() override {
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return 0;
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// VERY TEMPORARY. For now, borrowed from Arcem.
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// To replace with whatever the system-written default is.
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static constexpr uint8_t defaults[] = {
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0x00, 0x83, 0x55, 0x16, 0x14, 0x09, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x03, 0x14, 0x00, 0x6f, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x6d,
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0x00, 0xfe, 0x00, 0xeb, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x10, 0x50, 0x20, 0x08, 0x0a, 0x2c,
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0x80, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x5c, 0x13, 0x00, 0x00, 0x04, 0xfd, 0x08, 0x01, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
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};
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static_assert(sizeof(defaults) == 256);
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const uint8_t result = defaults[address_];
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++address_;
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return result;
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}
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void write(uint8_t value) override {
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if(expecting_address_) {
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address_ = value;
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expecting_address_ = false;
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} else {
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printf("Write to %d\n", address_);
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++address_;
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// TODO: write to RAM.
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// TODO: write.
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}
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}
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