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https://github.com/TomHarte/CLK.git
synced 2024-11-21 21:33:54 +00:00
Up clock rate to 24Mhz.
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@ -289,6 +289,11 @@ struct Memory {
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bool write(uint32_t address, IntT source, InstructionSet::ARM::Mode mode, bool trans) {
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(void)trans;
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// if(address == 0x0200002c && address < 0x04000000) {
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// if(address == 0x02000074) {
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// printf("%08x <- %08x\n", address, source);
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// }
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//
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switch (write_zones_[(address >> 21) & 31]) {
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case Zone::DMAAndMEMC:
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// if(mode != InstructionSet::ARM::Mode::Supervisor) return false;
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@ -434,7 +439,12 @@ struct Memory {
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template <typename IntT>
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IntT &physical_ram(uint32_t address) {
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return *reinterpret_cast<IntT *>(&ram_[address & (ram_.size() - 1)]);
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address &= ram_.size() - 1;
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if(address == (0x02000074 & (ram_.size() - 1))) {
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printf("%08x\n", address);
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}
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return *reinterpret_cast<IntT *>(&ram_[address]);
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}
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template <typename IntT>
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@ -641,8 +651,8 @@ class ConcreteMachine:
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public MachineTypes::TimedMachine,
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public MachineTypes::ScanProducer
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{
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// TODO: pick a sensible clock rate; this is just code for '20 MIPS, please'.
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static constexpr int ClockRate = 20'000'000;
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// TODO: pick a sensible clock rate; this is just code for '24 MIPS, please'.
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static constexpr int ClockRate = 24'000'000;
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// Timers tick at 2Mhz, so figure out the proper divider for that.
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static constexpr int TimerTarget = ClockRate / 2'000'000;
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@ -706,11 +716,11 @@ class ConcreteMachine:
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static bool log = false;
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// if(executor_.pc() == 0x02000058) {
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// printf("");
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// }
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// log |= (executor_.pc() == 0x02000054);
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// log = (executor_.pc() == 0x038019dc);
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if(executor_.pc() == 0x03801a1c) {
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printf("");
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}
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// log |= (executor_.pc() > 0 && executor_.pc() < 0x03800000);
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log |= (executor_.pc() == 0x038019e0);
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if(log) {
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logger.info().append("%08x: %08x prior:[r0:%08x r1:%08x r4:%08x r10:%08x r14:%08x]",
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