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Give PLB the same stack behaviour as PLD.
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@ -667,8 +667,8 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
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target(OperationPerform);
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target(OperationPerform);
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}
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}
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// 22b(ii). Stack; s, PLx, ignoring emulation mode. I.e. PLD.
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// 22b(ii). Stack; s, PLx, ignoring emulation mode. I.e. PLD and PLB.
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static void stack_pld(AccessType, bool, const std::function<void(MicroOp)> &target) {
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static void stack_pld_plb(AccessType, bool, const std::function<void(MicroOp)> &target) {
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target(CycleFetchPCThrowaway); // IO.
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target(CycleFetchPCThrowaway); // IO.
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target(CycleFetchPCThrowaway); // IO.
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target(CycleFetchPCThrowaway); // IO.
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@ -873,7 +873,7 @@ ProcessorStorage::ProcessorStorage() {
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/* 0x28 PLP s */ op(stack_pull, PLP, AccessMode::Always8Bit);
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/* 0x28 PLP s */ op(stack_pull, PLP, AccessMode::Always8Bit);
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/* 0x29 AND # */ op(immediate, AND);
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/* 0x29 AND # */ op(immediate, AND);
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/* 0x2a ROL A */ op(accumulator, ROL);
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/* 0x2a ROL A */ op(accumulator, ROL);
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/* 0x2b PLD s */ op(stack_pld, PLD);
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/* 0x2b PLD s */ op(stack_pld_plb, PLD);
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/* 0x2c BIT a */ op(absolute, BIT);
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/* 0x2c BIT a */ op(absolute, BIT);
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/* 0x2d AND a */ op(absolute, AND);
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/* 0x2d AND a */ op(absolute, AND);
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/* 0x2e ROL a */ op(absolute_rmw, ROL);
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/* 0x2e ROL a */ op(absolute_rmw, ROL);
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@ -1009,7 +1009,7 @@ ProcessorStorage::ProcessorStorage() {
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/* 0xa8 TAY i */ op(implied, TAY);
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/* 0xa8 TAY i */ op(implied, TAY);
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/* 0xa9 LDA # */ op(immediate, LDA);
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/* 0xa9 LDA # */ op(immediate, LDA);
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/* 0xaa TAX i */ op(implied, TAX);
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/* 0xaa TAX i */ op(implied, TAX);
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/* 0xab PLB s */ op(stack_pull, PLB, AccessMode::Always8Bit);
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/* 0xab PLB s */ op(stack_pld_plb, PLB, AccessMode::Always8Bit);
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/* 0xac LDY a */ op(absolute, LDY);
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/* 0xac LDY a */ op(absolute, LDY);
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/* 0xad LDA a */ op(absolute, LDA);
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/* 0xad LDA a */ op(absolute, LDA);
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/* 0xae LDX a */ op(absolute, LDX);
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/* 0xae LDX a */ op(absolute, LDX);
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