6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2025-01-12 15:31:09 +00:00
Code Issues Projects Releases Wiki Activity

Removed some minor duplicity and ensured that hsync/NMI ends on the nominated cycle, not one afterwards.

Browse Source
This commit is contained in:
Thomas Harte 2017-06-21 21:44:42 -04:00
parent 15f6c51062
commit a6810fc3ef
1 changed files with 2 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
Machines/ZX8081/ZX8081.cpp
View File

@ -41,7 +41,7 @@ int Machine::perform_machine_cycle(const CPU::Z80::PartialMachineCycle &cycle) {
}
}
video_->run_for_cycles(horizontal_counter_ - vsync_start_cycle_);
} else if(previous_counter <= vsync_end_cycle_ && horizontal_counter_ > vsync_end_cycle_) {
} else if(previous_counter < vsync_end_cycle_ && horizontal_counter_ >= vsync_end_cycle_) {
video_->run_for_cycles(vsync_end_cycle_ - previous_counter);
set_hsync(false);
if(nmi_is_enabled_) {
@ -54,8 +54,7 @@ int Machine::perform_machine_cycle(const CPU::Z80::PartialMachineCycle &cycle) {
}
if(is_zx81_) horizontal_counter_ %= 207;
// tape_player_.run_for_cycles(cycle.length + wait_cycles);
// tape_player_.run_for_cycles(cycle.length);
if(!cycle.is_terminal()) {
return 0;
@ -188,8 +187,6 @@ void Machine::configure_as_target(const StaticAnalyser::Target &target) {
rom_ = zx81_rom_;
tape_trap_address_ = 0x37c;
tape_return_address_ = 0x380;
vsync_start_cycle_ = 13;
vsync_end_cycle_ = 33;
vsync_start_cycle_ = 16;
vsync_end_cycle_ = 32;
} else {