From a6a4c5a93642fec6350fba201eeac0f6bc1af0f2 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Mon, 29 May 2017 15:57:27 -0400 Subject: [PATCH] Made an attempt to introduce checking of bus activity against the FUSE tests. Appears to suggest 54 new failures. --- .../Bridges/TestMachineZ80.h | 20 ++++---- .../Bridges/TestMachineZ80.mm | 40 ++++++++++++---- .../Mac/Clock SignalTests/FUSETests.swift | 47 ++++++++++++++++++- .../Mac/Clock SignalTests/ZexallTests.swift | 5 +- Processors/Z80/Z80AllRAM.cpp | 2 +- 5 files changed, 93 insertions(+), 21 deletions(-) diff --git a/OSBindings/Mac/Clock SignalTests/Bridges/TestMachineZ80.h b/OSBindings/Mac/Clock SignalTests/Bridges/TestMachineZ80.h index a7e6d7612..df202a892 100644 --- a/OSBindings/Mac/Clock SignalTests/Bridges/TestMachineZ80.h +++ b/OSBindings/Mac/Clock SignalTests/Bridges/TestMachineZ80.h @@ -12,19 +12,21 @@ @class CSTestMachineZ80; @protocol CSTestMachineTrapHandler -- (void)testMachine:(CSTestMachineZ80 *)testMachine didTrapAtAddress:(uint16_t)address; +- (void)testMachine:(nonnull CSTestMachineZ80 *)testMachine didTrapAtAddress:(uint16_t)address; @end typedef NS_ENUM(NSInteger, CSTestMachineZ80BusOperationCaptureOperation) { CSTestMachineZ80BusOperationCaptureOperationRead, - CSTestMachineZ80BusOperationCaptureOperationWrite + CSTestMachineZ80BusOperationCaptureOperationWrite, + CSTestMachineZ80BusOperationCaptureOperationPortRead, + CSTestMachineZ80BusOperationCaptureOperationPortWrite, }; @interface CSTestMachineZ80BusOperationCapture: NSObject -@property(nonatomic, assign) CSTestMachineZ80BusOperationCaptureOperation operation; -@property(nonatomic, assign) uint16_t address; -@property(nonatomic, assign) uint8_t value; -@property(nonatomic, assign) int timeStamp; +@property(nonatomic, readonly) CSTestMachineZ80BusOperationCaptureOperation operation; +@property(nonatomic, readonly) uint16_t address; +@property(nonatomic, readonly) uint8_t value; +@property(nonatomic, readonly) int timeStamp; @end typedef NS_ENUM(NSInteger, CSTestMachineZ80Register) { @@ -46,7 +48,7 @@ typedef NS_ENUM(NSInteger, CSTestMachineZ80Register) { @interface CSTestMachineZ80 : NSObject -- (void)setData:(NSData *)data atAddress:(uint16_t)startAddress; +- (void)setData:(nonnull NSData *)data atAddress:(uint16_t)startAddress; - (void)setValue:(uint8_t)value atAddress:(uint16_t)address; - (uint8_t)valueAtAddress:(uint16_t)address; @@ -56,11 +58,11 @@ typedef NS_ENUM(NSInteger, CSTestMachineZ80Register) { - (void)setValue:(uint16_t)value forRegister:(CSTestMachineZ80Register)reg; - (uint16_t)valueForRegister:(CSTestMachineZ80Register)reg; -@property(nonatomic, weak) id trapHandler; +@property(nonatomic, weak, nullable) id trapHandler; - (void)addTrapAddress:(uint16_t)trapAddress; @property(nonatomic, assign) BOOL captureBusActivity; -@property(nonatomic, readonly) NSArray *busOperationCaptures; +@property(nonatomic, readonly, nonnull) NSArray *busOperationCaptures; @property(nonatomic, readonly) BOOL isHalted; diff --git a/OSBindings/Mac/Clock SignalTests/Bridges/TestMachineZ80.mm b/OSBindings/Mac/Clock SignalTests/Bridges/TestMachineZ80.mm index ab014dbe9..b66c028a4 100644 --- a/OSBindings/Mac/Clock SignalTests/Bridges/TestMachineZ80.mm +++ b/OSBindings/Mac/Clock SignalTests/Bridges/TestMachineZ80.mm @@ -79,6 +79,13 @@ static CPU::Z80::Register registerForRegister(CSTestMachineZ80Register reg) { #pragma mark - Capture class +@interface CSTestMachineZ80BusOperationCapture() +@property(nonatomic, assign) CSTestMachineZ80BusOperationCaptureOperation operation; +@property(nonatomic, assign) uint16_t address; +@property(nonatomic, assign) uint8_t value; +@property(nonatomic, assign) int timeStamp; +@end + @implementation CSTestMachineZ80BusOperationCapture - (NSString *)description { @@ -106,6 +113,7 @@ static CPU::Z80::Register registerForRegister(CSTestMachineZ80Register reg) { if(self = [super init]) { _cppTrapHandler = new MachineTrapHandler(self); _busOperationHandler = new BusOperationHandler(self); + _busOperationCaptures = [[NSMutableArray alloc] init]; _processor.set_trap_handler(_cppTrapHandler); _processor.set_memory_access_delegate(_busOperationHandler); @@ -178,17 +186,33 @@ static CPU::Z80::Register registerForRegister(CSTestMachineZ80Register reg) { _isAtReadOpcode = YES; if(self.captureBusActivity) { - if(!_busOperationCaptures) _busOperationCaptures = [[NSMutableArray alloc] init]; + CSTestMachineZ80BusOperationCapture *capture = [[CSTestMachineZ80BusOperationCapture alloc] init]; + switch(operation) { + case CPU::Z80::BusOperation::Write: + capture.operation = CSTestMachineZ80BusOperationCaptureOperationWrite; + break; - if(operation == CPU::Z80::BusOperation::Read || operation == CPU::Z80::BusOperation::ReadOpcode || operation == CPU::Z80::BusOperation::Write) { - CSTestMachineZ80BusOperationCapture *capture = [[CSTestMachineZ80BusOperationCapture alloc] init]; - capture.operation = (operation == CPU::Z80::BusOperation::Write) ? CSTestMachineZ80BusOperationCaptureOperationWrite : CSTestMachineZ80BusOperationCaptureOperationRead; - capture.address = address; - capture.value = value; - capture.timeStamp = timeStamp; + case CPU::Z80::BusOperation::Read: + case CPU::Z80::BusOperation::ReadOpcode: + capture.operation = CSTestMachineZ80BusOperationCaptureOperationRead; + break; - [_busOperationCaptures addObject:capture]; + case CPU::Z80::BusOperation::Input: + capture.operation = CSTestMachineZ80BusOperationCaptureOperationPortRead; + break; + + case CPU::Z80::BusOperation::Output: + capture.operation = CSTestMachineZ80BusOperationCaptureOperationPortWrite; + break; + + default: + return; } + capture.address = address; + capture.value = value; + capture.timeStamp = timeStamp; + + [_busOperationCaptures addObject:capture]; } } diff --git a/OSBindings/Mac/Clock SignalTests/FUSETests.swift b/OSBindings/Mac/Clock SignalTests/FUSETests.swift index 004bfed6e..1aaaf08ff 100644 --- a/OSBindings/Mac/Clock SignalTests/FUSETests.swift +++ b/OSBindings/Mac/Clock SignalTests/FUSETests.swift @@ -175,6 +175,7 @@ class FUSETests: XCTestCase { let targetState = RegisterState(dictionary: outputDictionary["state"] as! [String: Any]) let machine = CSTestMachineZ80() + machine.captureBusActivity = true initialState.set(onMachine: machine) let inputMemoryGroups = itemDictionary["memory"] as? [Any] @@ -211,7 +212,51 @@ class FUSETests: XCTestCase { } } - // TODO compare bus operations + // Compare bus operations. + let capturedBusActivity = machine.busOperationCaptures + var capturedBusAcivityIndex = 0; + + let desiredBusActivity = outputDictionary["busActivity"] as? [[String: Any]] + if let desiredBusActivity = desiredBusActivity { + for action in desiredBusActivity { + let type = action["type"] as! String + let time = action["time"] as! Int32 + let address = action["address"] as! UInt16 + let value = action["value"] as? UInt8 + + if type == "MC" || type == "PC" { + // Don't do anything with FUSE's contended memory records; it's + // presently unclear to me exactly what they're supposed to communicate + continue + } + + var operation: CSTestMachineZ80BusOperationCaptureOperation = .read + switch type { + case "MR": + operation = .read + + case "MW": + operation = .write + + case "PR": + operation = .portRead + + case "PW": + operation = .portWrite + + default: + print("Unhandled activity type \(type)!") + } + + XCTAssert( + capturedBusActivity[capturedBusAcivityIndex].address == address && + capturedBusActivity[capturedBusAcivityIndex].value == value! && + capturedBusActivity[capturedBusAcivityIndex].timeStamp == time && + capturedBusActivity[capturedBusAcivityIndex].operation == operation, + "Failed bus operation match \(name)") + capturedBusAcivityIndex += 1 + } + } } } } diff --git a/OSBindings/Mac/Clock SignalTests/ZexallTests.swift b/OSBindings/Mac/Clock SignalTests/ZexallTests.swift index 6e461afdf..682047089 100644 --- a/OSBindings/Mac/Clock SignalTests/ZexallTests.swift +++ b/OSBindings/Mac/Clock SignalTests/ZexallTests.swift @@ -41,7 +41,7 @@ class ZexallTests: XCTestCase, CSTestMachineTrapHandler { } } - func testMachine(_ testMachine: CSTestMachineZ80!, didTrapAtAddress address: UInt16) { + func testMachine(_ testMachine: CSTestMachineZ80, didTrapAtAddress address: UInt16) { switch address { case 0x0005: let cRegister = testMachine.value(for: .C) @@ -67,7 +67,8 @@ class ZexallTests: XCTestCase, CSTestMachineTrapHandler { break } case 0x0000: - done = true; + done = true + default: break } diff --git a/Processors/Z80/Z80AllRAM.cpp b/Processors/Z80/Z80AllRAM.cpp index 9a32681f0..84652b392 100644 --- a/Processors/Z80/Z80AllRAM.cpp +++ b/Processors/Z80/Z80AllRAM.cpp @@ -16,7 +16,7 @@ AllRAMProcessor::AllRAMProcessor() : ::CPU::AllRAMProcessor(65536), delegate_(nu int AllRAMProcessor::perform_machine_cycle(const MachineCycle *cycle) { switch(cycle->operation) { case BusOperation::ReadOpcode: -// printf("! %02x\n", memory_[*cycle->address]); +// printf("%04x %02x [BC=%02x]\n", *cycle->address, memory_[*cycle->address], get_value_of_register(CPU::Z80::Register::BC)); check_address_for_trap(*cycle->address); case BusOperation::Read: // printf("r %04x [%02x] AF:%04x BC:%04x DE:%04x HL:%04x SP:%04x\n", *cycle->address, memory_[*cycle->address], get_value_of_register(CPU::Z80::Register::AF), get_value_of_register(CPU::Z80::Register::BC), get_value_of_register(CPU::Z80::Register::DE), get_value_of_register(CPU::Z80::Register::HL), get_value_of_register(CPU::Z80::Register::StackPointer));