From a7e8aef9d36a645bb11720cf3846c868ec718c25 Mon Sep 17 00:00:00 2001
From: Thomas Harte <thomas.harte@gmail.com>
Date: Tue, 24 May 2022 11:30:09 -0400
Subject: [PATCH] Add MOVEA, be slightly more careful about next_operand_.

---
 .../Implementation/68000Mk2Implementation.hpp   | 17 ++++++++++-------
 .../68000Mk2/Implementation/68000Mk2Storage.hpp |  2 +-
 2 files changed, 11 insertions(+), 8 deletions(-)

diff --git a/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp b/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
index 98ca9d4e1..8ef1ac652 100644
--- a/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
+++ b/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
@@ -20,7 +20,7 @@ namespace MC68000Mk2 {
 // TODO: BERR, interrupt inputs, etc; and obeying the trace flag.
 // Also, from Instruction.hpp:
 //
-//	MOVEAw, MOVEAl
+//	TRAP, TRAPV
 //
 // Not provided by a 68000: Bccl, BSRl
 
@@ -585,7 +585,9 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
 				StdCASE(EXTwtol, 	perform_state_ = Perform_np);
 
 				StdCASE(MOVEb,		perform_state_ = MOVE);
+				Duplicate(MOVEAw, MOVEw)
 				StdCASE(MOVEw,		perform_state_ = MOVE);
+				Duplicate(MOVEAl, MOVEl)
 				StdCASE(MOVEl,		perform_state_ = MOVE);
 
 				StdCASE(CMPb,		perform_state_ = Perform_np);
@@ -814,12 +816,10 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
 
 				StdCASE(LEA, {
 					post_ea_state_ = LEA;
-					next_operand_ = 0;
 					MoveToStateSpecific(CalcEffectiveAddress);
 				});
 				StdCASE(PEA, {
 					post_ea_state_ = PEA;
-					next_operand_ = 0;
 					MoveToStateSpecific(CalcEffectiveAddress);
 				});
 
@@ -830,7 +830,6 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
 					// for the other cases.
 					if(instruction_.mode(0) != Mode::DataRegisterDirect) {
 						post_ea_state_ = TAS;
-						next_operand_ = 0;
 						MoveToStateSpecific(CalcEffectiveAddress);
 					}
 
@@ -1439,9 +1438,13 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
 		//
 		// Various generic forms of perform.
 		//
-#define MoveToWritePhase()														\
-	next_operand_ = 0;															\
-	if(operand_flags_ & 0x0c) MoveToStateSpecific(StoreOperand) else MoveToStateSpecific(Decode)
+#define MoveToWritePhase()					\
+	if(operand_flags_ & 0x0c) {				\
+		next_operand_ = 0;					\
+		MoveToStateSpecific(StoreOperand);	\
+	} else {								\
+		MoveToStateSpecific(Decode);		\
+	}
 
 		BeginState(Perform_np):
 			PerformDynamic();
diff --git a/Processors/68000Mk2/Implementation/68000Mk2Storage.hpp b/Processors/68000Mk2/Implementation/68000Mk2Storage.hpp
index ee050c49f..09b27818d 100644
--- a/Processors/68000Mk2/Implementation/68000Mk2Storage.hpp
+++ b/Processors/68000Mk2/Implementation/68000Mk2Storage.hpp
@@ -87,7 +87,7 @@ struct ProcessorBase: public InstructionSet::M68k::NullFlowController {
 
 	/// When fetching or storing operands, this is the next one to fetch
 	/// or store.
-	int next_operand_ = 0;
+	int next_operand_ = -1;
 
 	/// Storage for a temporary address, which can't be a local because it'll
 	/// be used to populate microcycles, which may persist beyond an entry