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Don't hoard cycles per line value.

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This commit is contained in:
Thomas Harte 2024-03-21 21:47:27 -04:00
parent 4ac4da908c
commit aa6acec8fa
2 changed files with 1 additions and 6 deletions
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3
Machines/Acorn/Archimedes/Video.hpp
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@ -23,9 +23,6 @@ struct Video {
ram_(ram), ram_(ram),
crt_(Outputs::Display::InputDataType::Red4Green4Blue4) { crt_(Outputs::Display::InputDataType::Red4Green4Blue4) {
set_clock_divider(3); set_clock_divider(3);
// Limit to a subset of the PAL area.
crt_.set_visible_area(Outputs::Display::Rect(0.1f, 0.07f, 0.9f, 0.9f));
} }
void write(uint32_t value) { void write(uint32_t value) {

4
Outputs/CRT/CRT.cpp
View File

@ -58,6 +58,7 @@ void CRT::set_new_timing(int cycles_per_line, int height_of_display, Outputs::Di
vertical_flywheel_output_divider_ = (real_clock_scan_period + 65534) / 65535; vertical_flywheel_output_divider_ = (real_clock_scan_period + 65534) / 65535;
// Communicate relevant fields to the scan target. // Communicate relevant fields to the scan target.
scan_target_modals_.cycles_per_line = cycles_per_line;
scan_target_modals_.output_scale.x = uint16_t(horizontal_flywheel_->get_scan_period()); scan_target_modals_.output_scale.x = uint16_t(horizontal_flywheel_->get_scan_period());
scan_target_modals_.output_scale.y = uint16_t(real_clock_scan_period / vertical_flywheel_output_divider_); scan_target_modals_.output_scale.y = uint16_t(real_clock_scan_period / vertical_flywheel_output_divider_);
scan_target_modals_.expected_vertical_lines = height_of_display; scan_target_modals_.expected_vertical_lines = height_of_display;
@ -163,7 +164,6 @@ CRT::CRT( int cycles_per_line,
bool should_alternate, bool should_alternate,
Outputs::Display::InputDataType data_type) { Outputs::Display::InputDataType data_type) {
scan_target_modals_.input_data_type = data_type; scan_target_modals_.input_data_type = data_type;
scan_target_modals_.cycles_per_line = cycles_per_line;
scan_target_modals_.clocks_per_pixel_greatest_common_divisor = clocks_per_pixel_greatest_common_divisor; scan_target_modals_.clocks_per_pixel_greatest_common_divisor = clocks_per_pixel_greatest_common_divisor;
set_new_timing(cycles_per_line, height_of_display, colour_space, colour_cycle_numerator, colour_cycle_denominator, vertical_sync_half_lines, should_alternate); set_new_timing(cycles_per_line, height_of_display, colour_space, colour_cycle_numerator, colour_cycle_denominator, vertical_sync_half_lines, should_alternate);
} }
@ -173,7 +173,6 @@ CRT::CRT( int cycles_per_line,
Outputs::Display::Type display_type, Outputs::Display::Type display_type,
Outputs::Display::InputDataType data_type) { Outputs::Display::InputDataType data_type) {
scan_target_modals_.input_data_type = data_type; scan_target_modals_.input_data_type = data_type;
scan_target_modals_.cycles_per_line = cycles_per_line;
scan_target_modals_.clocks_per_pixel_greatest_common_divisor = clocks_per_pixel_greatest_common_divisor; scan_target_modals_.clocks_per_pixel_greatest_common_divisor = clocks_per_pixel_greatest_common_divisor;
set_new_display_type(cycles_per_line, display_type); set_new_display_type(cycles_per_line, display_type);
} }
@ -184,7 +183,6 @@ CRT::CRT(int cycles_per_line,
int vertical_sync_half_lines, int vertical_sync_half_lines,
Outputs::Display::InputDataType data_type) { Outputs::Display::InputDataType data_type) {
scan_target_modals_.input_data_type = data_type; scan_target_modals_.input_data_type = data_type;
scan_target_modals_.cycles_per_line = cycles_per_line;
scan_target_modals_.clocks_per_pixel_greatest_common_divisor = clocks_per_pixel_greatest_common_divisor; scan_target_modals_.clocks_per_pixel_greatest_common_divisor = clocks_per_pixel_greatest_common_divisor;
set_new_timing(cycles_per_line, height_of_display, Outputs::Display::ColourSpace::YIQ, 1, 1, vertical_sync_half_lines, false); set_new_timing(cycles_per_line, height_of_display, Outputs::Display::ColourSpace::YIQ, 1, 1, vertical_sync_half_lines, false);
} }