mirror of
https://github.com/TomHarte/CLK.git
synced 2024-11-23 03:32:32 +00:00
Formalise a separate manager of segments.
This commit is contained in:
parent
6c405680f2
commit
ac826f90c3
@ -256,13 +256,13 @@ template <
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case Operation::LDS:
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case Operation::LDS:
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if constexpr (data_size == DataSize::Word) {
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if constexpr (data_size == DataSize::Word) {
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Primitive::ld<Source::DS>(instruction, destination_w(), context);
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Primitive::ld<Source::DS>(instruction, destination_w(), context);
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context.registers.did_update(Source::DS);
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context.segments.did_update(Source::DS);
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}
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}
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return;
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return;
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case Operation::LES:
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case Operation::LES:
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if constexpr (data_size == DataSize::Word) {
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if constexpr (data_size == DataSize::Word) {
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Primitive::ld<Source::ES>(instruction, destination_w(), context);
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Primitive::ld<Source::ES>(instruction, destination_w(), context);
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context.registers.did_update(Source::ES);
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context.segments.did_update(Source::ES);
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}
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}
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return;
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return;
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@ -270,7 +270,7 @@ template <
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case Operation::MOV:
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case Operation::MOV:
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Primitive::mov<IntT>(destination_w(), source_r());
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Primitive::mov<IntT>(destination_w(), source_r());
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if constexpr (std::is_same_v<IntT, uint16_t>) {
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if constexpr (std::is_same_v<IntT, uint16_t>) {
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context.registers.did_update(instruction.destination().source());
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context.segments.did_update(instruction.destination().source());
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}
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}
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break;
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break;
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@ -341,7 +341,7 @@ template <
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case Operation::POP:
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case Operation::POP:
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destination_w() = Primitive::pop<IntT, false>(context);
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destination_w() = Primitive::pop<IntT, false>(context);
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if constexpr (std::is_same_v<IntT, uint16_t>) {
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if constexpr (std::is_same_v<IntT, uint16_t>) {
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context.registers.did_update(instruction.destination().source());
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context.segments.did_update(instruction.destination().source());
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}
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}
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break;
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break;
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case Operation::PUSH:
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case Operation::PUSH:
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@ -349,10 +349,26 @@ template <
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// hence PUSH is sometimes read-modify-write.
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// hence PUSH is sometimes read-modify-write.
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break;
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break;
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case Operation::POPF: Primitive::popf(context); return;
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case Operation::POPF:
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case Operation::PUSHF: Primitive::pushf(context); return;
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if constexpr (std::is_same_v<IntT, uint16_t> || std::is_same_v<IntT, uint32_t>) {
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case Operation::POPA: Primitive::popa<IntT>(context); return;
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Primitive::popf(context);
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case Operation::PUSHA: Primitive::pusha<IntT>(context); return;
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}
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return;
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case Operation::PUSHF:
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if constexpr (std::is_same_v<IntT, uint16_t> || std::is_same_v<IntT, uint32_t>) {
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Primitive::pushf(context);
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}
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return;
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case Operation::POPA:
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if constexpr (std::is_same_v<IntT, uint16_t> || std::is_same_v<IntT, uint32_t>) {
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Primitive::popa<IntT>(context);
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}
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return;
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case Operation::PUSHA:
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if constexpr (std::is_same_v<IntT, uint16_t> || std::is_same_v<IntT, uint32_t>) {
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Primitive::pusha<IntT>(context);
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}
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return;
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case Operation::CMPS:
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case Operation::CMPS:
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Primitive::cmps<IntT, AddressT, Repetition::None>(instruction, eCX(), eSI(), eDI(), context);
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Primitive::cmps<IntT, AddressT, Repetition::None>(instruction, eCX(), eSI(), eDI(), context);
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@ -95,7 +95,6 @@ template <typename IntT, typename ContextT>
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void popa(
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void popa(
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ContextT &context
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ContextT &context
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) {
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) {
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if constexpr (!std::is_same_v<IntT, uint8_t>) {
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context.memory.preauthorise_stack_read(sizeof(IntT) * 8);
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context.memory.preauthorise_stack_read(sizeof(IntT) * 8);
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if constexpr (std::is_same_v<IntT, uint32_t>) {
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if constexpr (std::is_same_v<IntT, uint32_t>) {
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context.registers.edi() = pop<uint32_t, true>(context);
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context.registers.edi() = pop<uint32_t, true>(context);
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@ -116,14 +115,12 @@ void popa(
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context.registers.cx() = pop<uint16_t, true>(context);
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context.registers.cx() = pop<uint16_t, true>(context);
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context.registers.ax() = pop<uint16_t, true>(context);
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context.registers.ax() = pop<uint16_t, true>(context);
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}
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}
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}
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}
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}
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template <typename IntT, typename ContextT>
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template <typename IntT, typename ContextT>
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void pusha(
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void pusha(
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ContextT &context
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ContextT &context
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) {
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) {
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if constexpr (!std::is_same_v<IntT, uint8_t>) {
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context.memory.preauthorise_stack_read(sizeof(IntT) * 8);
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context.memory.preauthorise_stack_read(sizeof(IntT) * 8);
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IntT initial_sp = context.registers.sp();
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IntT initial_sp = context.registers.sp();
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if constexpr (std::is_same_v<IntT, uint32_t>) {
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if constexpr (std::is_same_v<IntT, uint32_t>) {
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@ -145,7 +142,6 @@ void pusha(
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push<uint16_t, true>(context.registers.si(), context);
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push<uint16_t, true>(context.registers.si(), context);
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push<uint16_t, true>(context.registers.si(), context);
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push<uint16_t, true>(context.registers.si(), context);
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}
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}
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}
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}
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}
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}
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}
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@ -68,7 +68,6 @@ struct Registers {
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uint16_t &di() { return di_; }
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uint16_t &di() { return di_; }
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uint16_t es_, cs_, ds_, ss_;
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uint16_t es_, cs_, ds_, ss_;
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uint32_t es_base_, cs_base_, ds_base_, ss_base_;
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uint16_t ip_;
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uint16_t ip_;
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uint16_t &ip() { return ip_; }
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uint16_t &ip() { return ip_; }
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@ -78,17 +77,10 @@ struct Registers {
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uint16_t &ds() { return ds_; }
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uint16_t &ds() { return ds_; }
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uint16_t &ss() { return ss_; }
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uint16_t &ss() { return ss_; }
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using Source = InstructionSet::x86::Source;
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const uint16_t es() const { return es_; }
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/// Posted by @c perform after any operation which *might* have affected a segment register.
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const uint16_t cs() const { return cs_; }
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void did_update(Source segment) {
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const uint16_t ds() const { return ds_; }
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switch(segment) {
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const uint16_t ss() const { return ss_; }
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default: break;
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case Source::ES: es_base_ = es_ << 4; break;
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case Source::CS: cs_base_ = cs_ << 4; break;
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case Source::DS: ds_base_ = ds_ << 4; break;
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case Source::SS: ss_base_ = ss_ << 4; break;
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}
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}
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bool operator ==(const Registers &rhs) const {
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bool operator ==(const Registers &rhs) const {
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return
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return
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@ -104,19 +96,52 @@ struct Registers {
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cs_ == rhs.cs_ &&
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cs_ == rhs.cs_ &&
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ds_ == rhs.ds_ &&
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ds_ == rhs.ds_ &&
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si_ == rhs.si_ &&
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si_ == rhs.si_ &&
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ip_ == rhs.ip_ &&
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ip_ == rhs.ip_;
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es_base_ == rhs.es_base_ &&
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cs_base_ == rhs.cs_base_ &&
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ds_base_ == rhs.ds_base_ &&
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ss_base_ == rhs.ss_base_;
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}
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}
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};
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};
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class Segments {
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public:
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Segments(const Registers ®isters) : registers_(registers) {}
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using Source = InstructionSet::x86::Source;
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/// Posted by @c perform after any operation which *might* have affected a segment register.
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void did_update(Source segment) {
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switch(segment) {
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default: break;
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case Source::ES: es_base_ = registers_.es() << 4; break;
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case Source::CS: cs_base_ = registers_.cs() << 4; break;
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case Source::DS: ds_base_ = registers_.ds() << 4; break;
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case Source::SS: ss_base_ = registers_.ss() << 4; break;
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}
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}
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void reset() {
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did_update(Source::ES);
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did_update(Source::CS);
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did_update(Source::DS);
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did_update(Source::SS);
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}
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uint32_t es_base_, cs_base_, ds_base_, ss_base_;
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bool operator ==(const Segments &rhs) const {
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return
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es_base_ != rhs.es_base_ &&
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cs_base_ != rhs.cs_base_ &&
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ds_base_ != rhs.ds_base_ &&
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ss_base_ != rhs.ss_base_;
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}
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private:
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const Registers ®isters_;
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};
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struct Memory {
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struct Memory {
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public:
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public:
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using AccessType = InstructionSet::x86::AccessType;
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using AccessType = InstructionSet::x86::AccessType;
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// Constructor.
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// Constructor.
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Memory(Registers ®isters) : registers_(registers) {
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Memory(Registers ®isters, const Segments &segments) : registers_(registers), segments_(segments) {
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memory.resize(1024*1024);
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memory.resize(1024*1024);
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}
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}
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@ -237,6 +262,7 @@ struct Memory {
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std::unordered_map<uint32_t, Tag> tags;
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std::unordered_map<uint32_t, Tag> tags;
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std::vector<uint8_t> memory;
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std::vector<uint8_t> memory;
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const Registers ®isters_;
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const Registers ®isters_;
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const Segments &segments_;
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void preauthorise(uint32_t address) {
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void preauthorise(uint32_t address) {
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preauthorisations.insert(address);
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preauthorisations.insert(address);
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@ -256,10 +282,10 @@ struct Memory {
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uint32_t segment_base(InstructionSet::x86::Source segment) {
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uint32_t segment_base(InstructionSet::x86::Source segment) {
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using Source = InstructionSet::x86::Source;
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using Source = InstructionSet::x86::Source;
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switch(segment) {
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switch(segment) {
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default: return registers_.ds_base_;
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default: return segments_.ds_base_;
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case Source::ES: return registers_.es_base_;
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case Source::ES: return segments_.es_base_;
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case Source::CS: return registers_.cs_base_;
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case Source::CS: return segments_.cs_base_;
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case Source::SS: return registers_.ss_base_;
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case Source::SS: return segments_.ss_base_;
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}
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}
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}
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}
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@ -339,8 +365,8 @@ struct IO {
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};
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};
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class FlowController {
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class FlowController {
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public:
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public:
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FlowController(Memory &memory, Registers ®isters, Flags &flags) :
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FlowController(Memory &memory, Registers ®isters, Segments &segments, Flags &flags) :
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memory_(memory), registers_(registers), flags_(flags) {}
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memory_(memory), registers_(registers), segments_(segments), flags_(flags) {}
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// Requirements for perform.
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// Requirements for perform.
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void jump(uint16_t address) {
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void jump(uint16_t address) {
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@ -349,7 +375,7 @@ class FlowController {
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void jump(uint16_t segment, uint16_t address) {
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void jump(uint16_t segment, uint16_t address) {
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registers_.cs_ = segment;
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registers_.cs_ = segment;
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registers_.did_update(Registers::Source::CS);
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segments_.did_update(Segments::Source::CS);
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registers_.ip_ = address;
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registers_.ip_ = address;
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}
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}
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@ -371,6 +397,7 @@ class FlowController {
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private:
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private:
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Memory &memory_;
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Memory &memory_;
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Registers ®isters_;
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Registers ®isters_;
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Segments &segments_;
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Flags &flags_;
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Flags &flags_;
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bool should_repeat_ = false;
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bool should_repeat_ = false;
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};
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};
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@ -378,12 +405,16 @@ class FlowController {
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struct ExecutionSupport {
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struct ExecutionSupport {
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Flags flags;
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Flags flags;
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Registers registers;
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Registers registers;
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Segments segments;
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Memory memory;
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Memory memory;
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FlowController flow_controller;
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FlowController flow_controller;
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IO io;
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IO io;
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static constexpr auto model = InstructionSet::x86::Model::i8086;
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static constexpr auto model = InstructionSet::x86::Model::i8086;
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ExecutionSupport(): memory(registers), flow_controller(memory, registers, flags) {}
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ExecutionSupport():
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memory(registers, segments),
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segments(registers),
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flow_controller(memory, registers, segments, flags) {}
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void clear() {
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void clear() {
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memory.clear();
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memory.clear();
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@ -560,11 +591,6 @@ struct FailedExecution {
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registers.ss_ = [value[@"ss"] intValue];
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registers.ss_ = [value[@"ss"] intValue];
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registers.ip_ = [value[@"ip"] intValue];
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registers.ip_ = [value[@"ip"] intValue];
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registers.did_update(Registers::Source::ES);
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registers.did_update(Registers::Source::CS);
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registers.did_update(Registers::Source::DS);
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registers.did_update(Registers::Source::SS);
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const uint16_t flags_value = [value[@"flags"] intValue];
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const uint16_t flags_value = [value[@"flags"] intValue];
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flags.set(flags_value);
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flags.set(flags_value);
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@ -610,6 +636,7 @@ struct FailedExecution {
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[self populate:initial_registers flags:initial_flags value:initial_state[@"regs"]];
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[self populate:initial_registers flags:initial_flags value:initial_state[@"regs"]];
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execution_support.flags = initial_flags;
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execution_support.flags = initial_flags;
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execution_support.registers = initial_registers;
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execution_support.registers = initial_registers;
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execution_support.segments.reset();
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// Execute instruction.
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// Execute instruction.
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//
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//
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@ -657,8 +684,11 @@ struct FailedExecution {
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break;
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break;
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}
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}
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Segments intended_segments(intended_registers);
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[self populate:intended_registers flags:intended_flags value:final_state[@"regs"]];
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[self populate:intended_registers flags:intended_flags value:final_state[@"regs"]];
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const bool registersEqual = intended_registers == execution_support.registers;
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intended_segments.reset();
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const bool registersEqual = intended_registers == execution_support.registers && intended_segments == execution_support.segments;
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const bool flagsEqual = (intended_flags.get() & flags_mask) == (execution_support.flags.get() & flags_mask);
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const bool flagsEqual = (intended_flags.get() & flags_mask) == (execution_support.flags.get() & flags_mask);
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// Exit if no issues were found.
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// Exit if no issues were found.
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@ -703,7 +733,6 @@ struct FailedExecution {
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non_exception_registers.sp() = execution_support.registers.sp();
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non_exception_registers.sp() = execution_support.registers.sp();
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non_exception_registers.ax() = execution_support.registers.ax();
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non_exception_registers.ax() = execution_support.registers.ax();
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non_exception_registers.cs() = execution_support.registers.cs();
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non_exception_registers.cs() = execution_support.registers.cs();
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non_exception_registers.cs_base_ = execution_support.registers.cs_base_;
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if(non_exception_registers == execution_support.registers) {
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if(non_exception_registers == execution_support.registers) {
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failure_list = &permitted_failures;
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failure_list = &permitted_failures;
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