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mirror of https://github.com/TomHarte/CLK.git synced 2024-11-23 03:32:32 +00:00

Adds empty callouts for all serial port registers.

This commit is contained in:
Thomas Harte 2021-12-23 15:22:20 -05:00
parent 7ce335d9da
commit acba357df6
2 changed files with 17 additions and 6 deletions

View File

@ -885,10 +885,9 @@ void Chipset::write(uint32_t address, uint16_t value, bool allow_conversion) {
// Serial port. // Serial port.
case 0x030: // SERDAT case 0x030: // SERDAT
LOG("TODO: serial data: " << PADHEX(4) << value); serial_.set_data(value);
break; break;
case 0x032: // SERPER case 0x032: // SERPER
LOG("TODO: serial control: " << PADHEX(4) << value);
serial_.set_control(value); serial_.set_control(value);
break; break;
@ -1133,9 +1132,7 @@ uint16_t Chipset::read(uint32_t address, bool allow_conversion) {
return 0xffff; return 0xffff;
// Serial port. // Serial port.
case 0x018: // SERDATR case 0x018: return serial_.get_status();
LOG("TODO: serial data and status");
return 0x3000; // i.e. transmit buffer empty.
// DMA management. // DMA management.
case 0x002: return dma_control_ | blitter_.get_status(); // DMACONR case 0x002: return dma_control_ | blitter_.get_status(); // DMACONR
@ -1253,3 +1250,15 @@ void Chipset::set_component_prefers_clocking(ClockingHint::Source *, ClockingHin
void Chipset::flush() { void Chipset::flush() {
} }
// MARK: - Serial port.
void Chipset::SerialPort::set_control(uint16_t) {
}
void Chipset::SerialPort::set_data(uint16_t) {
}
uint16_t Chipset::SerialPort::get_status() {
return 0x3000;
}

View File

@ -208,7 +208,9 @@ class Chipset: private ClockingHint::Observer {
class SerialPort { class SerialPort {
public: public:
void set_control(uint16_t) {} void set_control(uint16_t);
void set_data(uint16_t);
uint16_t get_status();
private: private:
uint16_t value = 0, reload = 0; uint16_t value = 0, reload = 0;