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Implements STZ.

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This commit is contained in:
Thomas Harte 2018-08-10 21:17:02 -04:00
parent 8b50ab2593
commit aed4c0539e
4 changed files with 13 additions and 1 deletions
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4
OSBindings/Mac/Clock SignalTests/KlausDormannTests.swift
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@ -87,6 +87,10 @@ class KlausDormannTests: XCTestCase {
case 0x183a: return "STA (zp) acted as JAM" case 0x183a: return "STA (zp) acted as JAM"
case 0x1849: return "LDA/STA (zp) left flags in incorrect state" case 0x1849: return "LDA/STA (zp) left flags in incorrect state"
case 0x1983: return "STZ didn't store zero"
case 0x1b03: return "BIT didn't set flags correctly"
case 0: return "Didn't find tests" case 0: return "Didn't find tests"
default: return "Unknown error at \(String(format:"%04x", address))" default: return "Unknown error at \(String(format:"%04x", address))"
} }

1
Processors/6502/Implementation/6502Implementation.hpp
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@ -201,6 +201,7 @@ if(number_of_cycles <= Cycles(0)) break;
case OperationSTA: operand_ = a_; continue; case OperationSTA: operand_ = a_; continue;
case OperationSTX: operand_ = x_; continue; case OperationSTX: operand_ = x_; continue;
case OperationSTY: operand_ = y_; continue; case OperationSTY: operand_ = y_; continue;
case OperationSTZ: operand_ = 0; continue;
case OperationSAX: operand_ = a_ & x_; continue; case OperationSAX: operand_ = a_ & x_; continue;
case OperationSHA: operand_ = a_ & x_ & (address_.bytes.high+1); continue; case OperationSHA: operand_ = a_ & x_ & (address_.bytes.high+1); continue;
case OperationSHX: operand_ = x_ & (address_.bytes.high+1); continue; case OperationSHX: operand_ = x_ & (address_.bytes.high+1); continue;

6
Processors/6502/Implementation/6502Storage.cpp
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@ -286,6 +286,12 @@ ProcessorStorage::ProcessorStorage(Personality personality) {
Install(0xb2, ZeroIndirectRead(OperationLDA)); Install(0xb2, ZeroIndirectRead(OperationLDA));
Install(0xd2, ZeroIndirectRead(OperationCMP)); Install(0xd2, ZeroIndirectRead(OperationCMP));
Install(0xd2, ZeroIndirectRead(OperationSBC)); Install(0xd2, ZeroIndirectRead(OperationSBC));
// Add STZ.
Install(0x9c, AbsoluteWrite(OperationSTZ));
Install(0x9e, AbsoluteXWrite(OperationSTZ));
Install(0x64, ZeroWrite(OperationSTZ));
Install(0x74, ZeroXWrite(OperationSTZ));
} }
#undef Install #undef Install
} }

3
Processors/6502/Implementation/6502Storage.hpp
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@ -49,7 +49,8 @@ class ProcessorStorage {
OperationIncrementOperand, OperationORA, OperationAND, OperationEOR, OperationIncrementOperand, OperationORA, OperationAND, OperationEOR,
OperationINS, OperationADC, OperationSBC, OperationLDA, OperationINS, OperationADC, OperationSBC, OperationLDA,
OperationLDX, OperationLDY, OperationLAX, OperationSTA, OperationLDX, OperationLDY, OperationLAX, OperationSTA,
OperationSTX, OperationSTY, OperationSAX, OperationSHA, OperationSTX, OperationSTY, OperationSTZ,
OperationSAX, OperationSHA,
OperationSHX, OperationSHY, OperationSHS, OperationCMP, OperationSHX, OperationSHY, OperationSHS, OperationCMP,
OperationCPX, OperationCPY, OperationBIT, OperationASL, OperationCPX, OperationCPY, OperationBIT, OperationASL,
OperationASO, OperationROL, OperationRLA, OperationLSR, OperationASO, OperationROL, OperationRLA, OperationLSR,