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https://github.com/TomHarte/CLK.git
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This is almost complete, except that it doesn't act appropriately if some bits are written but not enough to cover the entire writing period.
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@@ -30,6 +30,11 @@ Controller::Controller(unsigned int clock_rate, unsigned int clock_rate_multipli
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void Controller::setup_track()
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{
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if(patched_track_)
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{
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drive_->set_track(patched_track_);
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}
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track_ = drive_->get_track();
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track_is_dirty_ = false;
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@@ -143,7 +148,12 @@ void Controller::write_bit(bool value)
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void Controller::end_writing()
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{
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is_reading_ = true;
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// TODO
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if(!patched_track_)
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{
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patched_track_.reset(new PCMPatchedTrack(track_));
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}
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patched_track_->add_segment(write_start_time_, write_segment_);
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}
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#pragma mark - PLL control and delegate
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