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mirror of https://github.com/TomHarte/CLK.git synced 2026-04-21 17:16:44 +00:00

This is almost complete, except that it doesn't act appropriately if some bits are written but not enough to cover the entire writing period.

This commit is contained in:
Thomas Harte
2016-12-24 22:51:26 -05:00
parent f601d796f5
commit af69b21033
2 changed files with 13 additions and 1 deletions
+11 -1
View File
@@ -30,6 +30,11 @@ Controller::Controller(unsigned int clock_rate, unsigned int clock_rate_multipli
void Controller::setup_track()
{
if(patched_track_)
{
drive_->set_track(patched_track_);
}
track_ = drive_->get_track();
track_is_dirty_ = false;
@@ -143,7 +148,12 @@ void Controller::write_bit(bool value)
void Controller::end_writing()
{
is_reading_ = true;
// TODO
if(!patched_track_)
{
patched_track_.reset(new PCMPatchedTrack(track_));
}
patched_track_->add_segment(write_start_time_, write_segment_);
}
#pragma mark - PLL control and delegate