6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2024-11-29 12:50:28 +00:00
Code Issues Projects Releases Wiki Activity

Adds some unused drives.

Browse Source
This commit is contained in:
Thomas Harte 2021-10-04 08:12:13 -07:00
parent 5ccb512883
commit b3f0ca39ed
3 changed files with 22 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
Machines/Amiga/Amiga.cpp
View File

@ -18,8 +18,6 @@
#include "../Utility/MemoryPacker.hpp" #include "../Utility/MemoryPacker.hpp"
#include "../Utility/MemoryFuzzer.hpp" #include "../Utility/MemoryFuzzer.hpp"
#include "../../Storage/Disk/Drive.hpp"
//#define NDEBUG //#define NDEBUG
#define LOG_PREFIX "[Amiga] " #define LOG_PREFIX "[Amiga] "
#include "../../Outputs/Log.hpp" #include "../../Outputs/Log.hpp"
@ -27,6 +25,15 @@
#include "Chipset.hpp" #include "Chipset.hpp"
#include "MemoryMap.hpp" #include "MemoryMap.hpp"
namespace {
// NTSC clock rate: 2*3.579545 = 7.15909Mhz.
// PAL clock rate: 7.09379Mhz; 227 cycles/line.
constexpr int PALClockRate = 7'093'790;
constexpr int NTSCClockRate = 7'159'090;
}
namespace Amiga { namespace Amiga {
class ConcreteMachine: class ConcreteMachine:
@ -38,7 +45,7 @@ class ConcreteMachine:
public: public:
ConcreteMachine(const Analyser::Static::Amiga::Target &target, const ROMMachine::ROMFetcher &rom_fetcher) : ConcreteMachine(const Analyser::Static::Amiga::Target &target, const ROMMachine::ROMFetcher &rom_fetcher) :
mc68000_(*this), mc68000_(*this),
chipset_(memory_) chipset_(memory_, PALClockRate)
{ {
(void)target; (void)target;
@ -51,9 +58,7 @@ class ConcreteMachine:
} }
Memory::PackBigEndian16(roms.find(rom_name)->second, memory_.kickstart.data()); Memory::PackBigEndian16(roms.find(rom_name)->second, memory_.kickstart.data());
// NTSC clock rate: 2*3.579545 = 7.15909Mhz. set_clock_rate(PALClockRate);
// PAL clock rate: 7.09379Mhz; 227 cycles/line.
set_clock_rate(7'093'790.0);
} }
// MARK: - MC68000::BusHandler. // MARK: - MC68000::BusHandler.

8
Machines/Amiga/Chipset.cpp
View File

@ -32,13 +32,19 @@ template <DMAFlag... Flags> struct DMAMask: Mask<DMAFlag, Flags...> {};
} }
Chipset::Chipset(MemoryMap &map) : Chipset::Chipset(MemoryMap &map, int input_clock_rate) :
cia_a_handler_(map), cia_a_handler_(map),
cia_a(cia_a_handler_), cia_a(cia_a_handler_),
cia_b(cia_b_handler_), cia_b(cia_b_handler_),
blitter_(*this, reinterpret_cast<uint16_t *>(map.chip_ram.data()), map.chip_ram.size() >> 1), blitter_(*this, reinterpret_cast<uint16_t *>(map.chip_ram.data()), map.chip_ram.size() >> 1),
bitplanes_(*this, reinterpret_cast<uint16_t *>(map.chip_ram.data()), map.chip_ram.size() >> 1), bitplanes_(*this, reinterpret_cast<uint16_t *>(map.chip_ram.data()), map.chip_ram.size() >> 1),
copper_(*this, reinterpret_cast<uint16_t *>(map.chip_ram.data()), map.chip_ram.size() >> 1), copper_(*this, reinterpret_cast<uint16_t *>(map.chip_ram.data()), map.chip_ram.size() >> 1),
drives_{
{input_clock_rate, 300, 2, Storage::Disk::Drive::ReadyType::ShugartRDY},
{input_clock_rate, 300, 2, Storage::Disk::Drive::ReadyType::ShugartRDY},
{input_clock_rate, 300, 2, Storage::Disk::Drive::ReadyType::ShugartRDY},
{input_clock_rate, 300, 2, Storage::Disk::Drive::ReadyType::ShugartRDY}
},
disk_(*this, reinterpret_cast<uint16_t *>(map.chip_ram.data()), map.chip_ram.size() >> 1), disk_(*this, reinterpret_cast<uint16_t *>(map.chip_ram.data()), map.chip_ram.size() >> 1),
crt_(908, 4, Outputs::Display::Type::PAL50, Outputs::Display::InputDataType::Red4Green4Blue4) { crt_(908, 4, Outputs::Display::Type::PAL50, Outputs::Display::InputDataType::Red4Green4Blue4) {
} }

5
Machines/Amiga/Chipset.hpp
View File

@ -16,6 +16,7 @@
#include "../../Components/6526/6526.hpp" #include "../../Components/6526/6526.hpp"
#include "../../Outputs/CRT/CRT.hpp" #include "../../Outputs/CRT/CRT.hpp"
#include "../../Processors/68000/68000.hpp" #include "../../Processors/68000/68000.hpp"
#include "../../Storage/Disk/Drive.hpp"
#include "Blitter.hpp" #include "Blitter.hpp"
#include "Copper.hpp" #include "Copper.hpp"
@ -59,7 +60,7 @@ enum class DMAFlag: uint16_t {
class Chipset { class Chipset {
public: public:
Chipset(MemoryMap &memory_map); Chipset(MemoryMap &memory_map, int input_clock_rate);
struct Changes { struct Changes {
int interrupt_level = 0; int interrupt_level = 0;
@ -241,6 +242,8 @@ class Chipset {
// MARK: - Disk drives. // MARK: - Disk drives.
Storage::Disk::Drive drives_[4];
class DiskDMA: public DMADevice<1> { class DiskDMA: public DMADevice<1> {
public: public:
using DMADevice::DMADevice; using DMADevice::DMADevice;