6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2026-04-21 17:16:44 +00:00
Code Issues Projects Releases Wiki Activity

Attempts to complete all addressing modes.

Browse Source 
So, if bugs didn't exist, it'd just be members of the Operation enum to go.
This commit is contained in:
Thomas Harte
2020-10-05 17:04:57 -04:00
parent 825201f4f2
commit b7ba0d4327
3 changed files with 101 additions and 23 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Processors/65816/Implementation/65816Storage.cpp
+2 -6
View File
@@ -424,21 +424,17 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
static void direct_indirect_indexed(AccessType type, bool is8bit, const std::function<void(MicroOp)> &target) {
target(CycleFetchIncrementPC); // DO.
target(OperationConstructDirectIndirect);
target(OperationConstructDirect);
target(CycleFetchPC); // IO.
target(CycleFetchIncrementData); // AAL.
target(CycleFetchData); // AAH.
target(OperationConstructDirectIndirectIndexed);
target(OperationConstructAbsoluteYRead);
target(CycleFetchIncorrectDataAddress); // IO.
read_write(type, is8bit, target);
}
// TODO: verify, especially re: false addresses.
// i.e. it currently looks to me superficially as though I can reuse
// OperationConstructDirectIndirect here, but writing the proper
// interpreter will help to clarify.
// 14. Direct Indirect Indexed Long; [d], y.
static void direct_indirect_indexed_long(AccessType type, bool is8bit, const std::function<void(MicroOp)> &target) {