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https://github.com/TomHarte/CLK.git
synced 2025-01-11 08:30:55 +00:00
Added getters for most of the input lines, and attempted to round out the ZX81's wait logic.
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@ -36,9 +36,6 @@ int Machine::perform_machine_cycle(const CPU::Z80::PartialMachineCycle &cycle) {
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set_hsync(true);
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if(nmi_is_enabled_) {
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set_non_maskable_interrupt_line(true);
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if(!get_halt_line()) {
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set_wait_line(true);
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}
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}
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video_->run_for_cycles(horizontal_counter_ - vsync_start_cycle_);
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} else if(previous_counter < vsync_end_cycle_ && horizontal_counter_ >= vsync_end_cycle_) {
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@ -56,6 +53,10 @@ int Machine::perform_machine_cycle(const CPU::Z80::PartialMachineCycle &cycle) {
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if(is_zx81_) horizontal_counter_ %= 207;
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tape_player_.run_for_cycles(cycle.length);
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if(nmi_is_enabled_ && !get_halt_line() && get_non_maskable_interrupt_line()) {
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set_wait_line(true);
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}
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if(!cycle.is_terminal()) {
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return 0;
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}
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@ -192,7 +192,7 @@ template <class T> class Processor {
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};
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uint8_t request_status_;
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uint8_t last_request_status_;
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bool irq_line_;
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bool irq_line_, nmi_line_;
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bool bus_request_line_;
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bool wait_line_;
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@ -771,6 +771,7 @@ template <class T> class Processor {
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request_status_(Interrupt::PowerOn),
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last_request_status_(Interrupt::PowerOn),
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irq_line_(false),
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nmi_line_(false),
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bus_request_line_(false),
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pc_increment_(1),
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scheduled_program_counter_(nullptr) {
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@ -1888,6 +1889,10 @@ template <class T> class Processor {
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}
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}
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bool get_interrupt_line() {
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return irq_line_;
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}
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/*!
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Sets the logical value of the non-maskable interrupt line.
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@ -1895,6 +1900,7 @@ template <class T> class Processor {
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*/
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void set_non_maskable_interrupt_line(bool value, int offset = 0) {
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// NMIs are edge triggered and cannot be masked.
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nmi_line_ = value;
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if(value) {
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request_status_ |= Interrupt::NMI;
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if(offset < 0) {
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@ -1903,6 +1909,10 @@ template <class T> class Processor {
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}
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}
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bool get_non_maskable_interrupt_line() {
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return nmi_line_;
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}
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/*!
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Sets the logical value of the bus request line.
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*/
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@ -1910,6 +1920,10 @@ template <class T> class Processor {
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bus_request_line_ = value;
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}
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bool get_bus_request_line() {
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return bus_request_line_;
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}
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/*!
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Sets the logical value of the reset line.
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*/
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@ -1935,6 +1949,10 @@ template <class T> class Processor {
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wait_line_ = value;
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}
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bool get_wait_line() {
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return wait_line_;
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}
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/*!
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For receivers of perform_machine_cycle only. Temporarily rejects the current machine
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cycle, causing time to be rewinded to its beginning.
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