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Copy in some notes, expand line buffer.
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@ -67,7 +67,12 @@ enum class MemoryAccess {
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};
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// Temporary buffers collect a representation of each line prior to pixel serialisation.
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//
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// TODO: either template on personality, to avoid having to be the union of all potential footprints,
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// or just stop keeping so many of these in the 9918.
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struct LineBuffer {
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LineBuffer() {}
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// The line mode describes the proper timing diagram for this line.
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LineMode line_mode = LineMode::Text;
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@ -77,15 +82,25 @@ struct LineBuffer {
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// The names array holds pattern names, as an offset into memory, and
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// potentially flags also.
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struct {
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size_t offset = 0;
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uint8_t flags = 0;
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} names[40];
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union {
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// The TMS and Sega VDPs are close enough to always tile-based;
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// this struct captures maximal potential detail there.
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struct {
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struct {
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size_t offset = 0;
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uint8_t flags = 0;
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} names[40];
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// The patterns array holds tile patterns, corresponding 1:1 with names.
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// Four bytes per pattern is the maximum required by any
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// currently-implemented VDP.
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uint8_t patterns[40][4];
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// The patterns array holds tile patterns, corresponding 1:1 with names.
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// Four bytes per pattern is the maximum required by any
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// currently-implemented VDP.
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uint8_t patterns[40][4];
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};
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// The Yamaha VDP also has a variety of bitmap modes, the widest of which is
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// 512px @ 4bpp.
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uint8_t bitmap[256];
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};
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/*
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Horizontal layout (on a 342-cycle clock):
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@ -480,6 +480,25 @@ template<bool use_end> void Base<personality>::fetch_yamaha_refresh(int start, i
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template <Personality personality>
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template<bool use_end, bool fetch_sprites> void Base<personality>::fetch_yamaha(int start, int end) {
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/*
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Per http://map.grauw.nl/articles/vdp-vram-timing/vdp-timing.html :
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The major change compared to the previous mode is that now the VDP needs to fetch extra data
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for the bitmap rendering. These fetches happen in 32 blocks of 4 bytes (screen 5/6) or
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8 bytes (screen 7/8). The fetches within one block happen in burst mode. This means that
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one block takes 18 cycles (screen 5/6) or 20 cycles (screen 7/8). Though later we'll see
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that the two spare cycles for screen 5/6 are not used for anything else, so for simplicity
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we can say that in all bitmap modes a bitmap-fetch-block takes 20 cycles. This is even
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clearer if you look at the RAS signal: this signal follows the exact same pattern in all
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(bitmap) screen modes, so in screen 5/6 it remains active for two cycles longer than
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strictly necessary.
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Actually before these 32 blocks there's one extra dummy block. This block has the same timing
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as the other blocks, but it always reads address 0x1FFFF. From an emulator point of view,
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these dummy reads don't matter, it only matters that at those moments no other VRAM accesses
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can occur.
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*/
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(void)start;
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(void)end;
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}
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