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The test set doesn't seem to do word rotation.

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This commit is contained in:
Thomas Harte 2024-03-10 22:40:37 -04:00
parent ccdd340c9a
commit bd62228cc6
2 changed files with 17 additions and 8 deletions
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5
InstructionSets/ARM/Executor.hpp
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@ -313,8 +313,12 @@ struct Executor {
} else {
did_read = bus.template read<uint32_t>(address, value, registers_.mode(), trans);
if constexpr (model != Model::ARMv2with32bitAddressing) {
// "An address offset from a word boundary will cause the data to be rotated into the
// register so that the addressed byte occuplies bits 0 to 7."
//
// (though the test set that inspired 'ARMv2with32bitAddressing' appears not to honour this;
// test below assumes it went away by the version of ARM that set supports)
switch(address & 3) {
case 0: break;
case 1: value = (value >> 8) | (value << 24); break;
@ -322,6 +326,7 @@ struct Executor {
case 3: value = (value >> 24) | (value << 8); break;
}
}
}
if(!did_read) {
registers_.exception<Registers::Exception::DataAbort>();

6
OSBindings/Mac/Clock SignalTests/ARMDecoderTests.mm
View File

@ -381,6 +381,7 @@ struct MemoryLedger {
}
uint32_t r15_mask = 0xffff'ffff;
bool ignore_test = false;
switch(instruction) {
case 0x03110002:
// tsteq r1, #2; per my reading this is LSL#0 so the original
@ -395,7 +396,7 @@ struct MemoryLedger {
// sheet specifically says for a shift-by-register that
// "LSL by more than 32 has result zero, carry out zero" so I think
// the test set is adrift on the following:
if(test_count == 15) continue;
ignore_test = test_count == 15 - 1;
break;
case 0xe090e00f:
@ -422,6 +423,9 @@ struct MemoryLedger {
} else {
// Execute test and compare.
++test_count;
if(ignore_test) {
continue;
}
if(instruction == 0xe4931000 && test_count == 3) {
printf("");