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Brings ADC into conformance. Fixes JML.

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This commit is contained in:
Thomas Harte 2020-11-03 18:12:10 -05:00
parent 426e90eebf
commit bf85d71674
3 changed files with 19 additions and 3 deletions
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6
OSBindings/Mac/Clock SignalTests/65816kromTests.swift
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@ -59,6 +59,12 @@ class Krom65816Tests: XCTestCase {
var lineNumber = 1
var previousPC = 0
for line in outputLines {
// At least one of the traces ends with an empty line; my preference is not to
// modify the originals if possible.
if line == "" {
break
}
machine.runForNumber(ofInstructions: 1)
func machineState() -> String {

15
Processors/65816/Implementation/65816Implementation.hpp
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@ -622,8 +622,9 @@ template <typename BusHandler, bool uses_ready_line> void Processor<BusHandler,
//
case JML:
registers_.program_bank = instruction_buffer_.value & 0xff0000;
[[fallthrough]];
registers_.program_bank = data_buffer_.value & 0xff0000;
registers_.pc = uint16_t(data_buffer_.value);
break;
case JMP:
registers_.pc = uint16_t(instruction_buffer_.value);
@ -898,11 +899,17 @@ template <typename BusHandler, bool uses_ready_line> void Processor<BusHandler,
int result;
const uint16_t a = registers_.a.full & registers_.m_masks[1];
// As implemented below, this applies the 6502 test for overflow (i.e. based on the result
// prior to fixing up the final nibble) rather than the 65C02 (i.e. based on the final result).
// This tracks the online tests I found, which hail from Nintendo world. So I'm currently unclear
// whether this is correct or merely a figment of Nintendo's custom chip.
if(registers_.flags.decimal) {
uint16_t partials = 0;
result = registers_.flags.carry;
#define nibble(mask, limit, adjustment, carry) \
result += (a & mask) + (data_buffer_.value & mask); \
partials += result & mask; \
if(result >= limit) result = ((result + (adjustment)) & (carry - 1)) + carry;
nibble(0x000f, 0x000a, 0x0006, 0x00010);
@ -912,11 +919,13 @@ template <typename BusHandler, bool uses_ready_line> void Processor<BusHandler,
#undef nibble
registers_.flags.overflow = (( (partials ^ registers_.a.full) & (partials ^ data_buffer_.value) ) >> (1 + registers_.m_shift))&0x40;
} else {
result = int(a + data_buffer_.value + registers_.flags.carry);
registers_.flags.overflow = (( (uint16_t(result) ^ registers_.a.full) & (uint16_t(result) ^ data_buffer_.value) ) >> (1 + registers_.m_shift))&0x40;
}
registers_.flags.overflow = (( (uint16_t(result) ^ registers_.a.full) & (uint16_t(result) ^ data_buffer_.value) ) >> (1 + registers_.m_shift))&0x40;
registers_.flags.set_nz(uint16_t(result), registers_.m_shift);
registers_.flags.carry = (result >> (8 + registers_.m_shift))&1;
LD(registers_.a, result, registers_.m_masks);

1
Processors/65816/Implementation/65816Storage.cpp
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@ -310,6 +310,7 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
target(CycleFetchIncrementPC); // New PCH.
target(CycleFetchPC); // New PBR.
target(OperationCopyInstructionToData);
target(OperationPerform); // ['JMP' (though it's JML in internal terms)]
}