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mirror of https://github.com/TomHarte/CLK.git synced 2025-08-05 08:26:28 +00:00

Made a quick first attempt at all-the-way-through tape wiring for the Vic.

This commit is contained in:
Thomas Harte
2016-06-26 19:43:09 -04:00
parent 37ba42a52f
commit c306d705e1
4 changed files with 62 additions and 28 deletions

View File

@@ -178,6 +178,7 @@ template <class T> class MOS6522 {
_registers.interrupt_flags |= port ? InterruptFlag::CB1ActiveEdge : InterruptFlag::CA1ActiveEdge;
reevaluate_interrupts();
}
_control_inputs[port].line_one = value;
break;
case Line::Two: