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Increases asserts and adds a test.
Thereby discovers and fixes a problem with set_main_paging().
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@ -193,13 +193,13 @@ class MemoryMap {
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// This is highly redundant, but decouples this step from the above.
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for(size_t c = 0; c < 0x800000; c += 0x100) {
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if(c < ram.size() - 128*1024) {
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if(c < ram.size() - 0x02'0000) {
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set_storage(uint32_t(c), &ram[c], &ram[c]);
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}
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}
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uint8_t *const slow_ram = &ram[ram.size() - 0x20000];
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for(size_t c = 0xe00000; c < 0xe20000; c += 0x100) {
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set_storage(uint32_t(c), &slow_ram[c - 0xe00000], &slow_ram[c - 0xe00000]);
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uint8_t *const slow_ram = &ram[ram.size() - 0x02'0000] - 0xe0'0000;
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for(size_t c = 0xe0'0000; c < 0xe2'0000; c += 0x100) {
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set_storage(uint32_t(c), &slow_ram[c], &slow_ram[c]);
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}
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for(uint32_t c = 0; c < uint32_t(rom_bank_count); c++) {
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set_storage((first_rom_bank + c) << 16, &rom[c << 16], nullptr);
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@ -287,18 +287,15 @@ class MemoryMap {
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const bool inhibit_banks0001 = shadow_register_ & 0x40;
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auto apply = [&language_state, this](uint32_t bank_base, uint8_t *ram) {
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// All references below are to 0xc000, 0xd000 and 0xe000 but should
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// work regardless of bank.
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// This assumes bank 1 is the one before bank 2 when RAM is linear.
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uint8_t *const lower_ram_bank = ram - (language_state.bank2 ? 0x0000 : 0x1000);
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uint8_t *const d0_ram_bank = ram - (language_state.bank2 ? 0x0000 : 0x1000);
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// Crib the ROM pointer from a page it's always visible on.
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const uint8_t *const rom = ®ions[region_map[0xffd0]].read[0xffd000] - ((bank_base << 8) + 0xd000);
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auto &d0_region = regions[region_map[bank_base | 0xd0]];
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d0_region.read = language_state.read ? lower_ram_bank : rom;
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d0_region.write = language_state.write ? nullptr : lower_ram_bank;
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d0_region.read = language_state.read ? d0_ram_bank : rom;
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d0_region.write = language_state.write ? nullptr : d0_ram_bank;
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auto &e0_region = regions[region_map[bank_base | 0xe0]];
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e0_region.read = language_state.read ? ram : rom;
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@ -316,6 +313,10 @@ class MemoryMap {
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auto &e0_region = regions[region_map[bank_base | 0xe0]];
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e0_region.read = ram_base;
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e0_region.write = ram_base;
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// Assert assumptions made above re: memory layout.
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assert(region_map[bank_base | 0xd0] + 1 == region_map[bank_base | 0xe0]);
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assert(region_map[bank_base | 0xe0] == region_map[bank_base | 0xff]);
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};
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if(inhibit_banks0001) {
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@ -326,6 +327,8 @@ class MemoryMap {
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apply(0x0100, ram_base);
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}
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// The pointer stored in region_map[0xe000] has already been adjusted for
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// the 0xe0'0000 addressing offset.
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uint8_t *const e0_ram = regions[region_map[0xe000]].write;
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apply(0xe000, e0_ram);
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apply(0xe100, e0_ram);
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@ -517,13 +520,34 @@ class MemoryMap {
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region.write = flags.write ? &ram_base[0x10000] : ram_base; \
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}
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// Base: $0200–$03FF.
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set(0x02, state.base);
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set(0x08, state.base);
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set(0x40, state.base);
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assert(region_map[0x02] == region_map[0x00]+1);
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assert(region_map[0x04] == region_map[0x02]+1);
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// Region $0400–$07ff.
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set(0x04, state.region_04_08);
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assert(region_map[0x08] == region_map[0x04]+1);
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// Base: $0800–$1FFF.
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set(0x08, state.base);
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set(0x0c, state.base);
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assert(region_map[0x0c] == region_map[0x08]+1);
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assert(region_map[0x20] == region_map[0x0c]+1);
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// Region $2000–$3FFF.
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set(0x20, state.region_20_40);
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assert(region_map[0x40] == region_map[0x20]+1);
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// Base: $4000–$BFFF.
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set(0x40, state.base);
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set(0x60, state.base);
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assert(region_map[0x60] == region_map[0x40]+1);
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assert(region_map[0xc0] == region_map[0x60]+1);
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#undef set
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// This also affects shadowing flags, if shadowing is enabled at all,
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// and might affect RAM in the IO area of bank $00 because the language
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// card can be inhibited on a IIgs.
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@ -125,4 +125,16 @@ namespace {
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XCTAssertEqual([self readAddress:0x01'0400], 0xde);
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}
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- (void)testE0E1RAMConsistent {
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// Do some random language card paging, to hit set_language_card.
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_memoryMap.set_state_register(0x00);
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_memoryMap.set_state_register(0xff);
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[self write: 0x12 address:0xe0'0000];
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[self write: 0x34 address:0xe1'0000];
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XCTAssertEqual(_ram[_ram.size() - 128*1024], 0x12);
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XCTAssertEqual(_ram[_ram.size() - 64*1024], 0x34);
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}
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@end
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