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Switched display update and RAM write order.
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@ -46,12 +46,11 @@ unsigned int Machine::perform_bus_operation(CPU6502::BusOperation operation, uin
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}
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else
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{
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_ram[address] = *value;
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// TODO: range check on address; a lot of the time the machine will be running code outside of
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// the screen area, meaning that no update is required.
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// if (address
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// TODO: range check on address; a lot of the time the machine will be running code outside of
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// the screen area, meaning that no update is required.
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update_display();
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_ram[address] = *value;
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}
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// TODO: RAM timing for Modes 0–3
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