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Fills in enough of the SCC to allow completion of the Macintosh side of that relationship.
This commit is contained in:
Thomas Harte
parent
ec5701459c
commit
ccd2cb44a2
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@ -8,34 +8,73 @@
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#include "z8530.hpp"
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#include "../../Outputs/Log.hpp"
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using namespace Zilog::SCC;
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void z8530::reset() {
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// TODO.
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}
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bool z8530::get_interrupt_line() {
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// TODO.
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return false;
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}
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std::uint8_t z8530::read(int address) {
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return channels_[address & 1].read(address & 2);
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const auto result = channels_[address & 1].read(address & 2, pointer_);
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pointer_ = 0;
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return result;
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}
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void z8530::write(int address, std::uint8_t value) {
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channels_[address & 1].write(address & 2, pointer_, value);
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if(address & 2) {
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// Write data register for channel.
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} else {
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// Write control register for channel.
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/*
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Control register 0, which includes the pointer bits,
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is decoded here because there's only one set of pointer bits.
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*/
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if(!(address & 2)) {
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// Most registers are per channel, but a couple are shared; sever
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// them here.
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switch(pointer_) {
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default:
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channels_[address & 1].write(address & 2, pointer_, value);
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break;
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case 2: // Interrupt vector register; shared between both channels.
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interrupt_vector_ = value;
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LOG("[SCC] Interrupt vector set to " << PADHEX(2) << int(value));
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break;
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case 9: // Master interrupt and reset register; also shared between both channels.
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LOG("[SCC] TODO: master interrupt and reset register " << PADHEX(2) << int(value));
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break;
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}
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// The pointer number resets to 0 after every access, but if it is zero
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// then crib at least the next set of pointer bits (which, similarly, are shared
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// between the two channels).
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if(pointer_) {
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pointer_ = 0;
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} else {
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// The lowest three bits are the lowest three bits of the pointer.
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pointer_ = value & 7;
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// If the command part of the byte is a 'point high', also set the
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// top bit of the pointer.
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if(((value >> 3)&7) == 1) {
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pointer_ |= 8;
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}
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}
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}
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}
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uint8_t z8530::Channel::read(bool data) {
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uint8_t z8530::Channel::read(bool data, uint8_t pointer) {
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// If this is a data read, just return it.
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if(data) return data_;
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if(data) {
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return data_;
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} else {
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LOG("[SCC] Unrecognised control read from register " << int(pointer));
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}
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// Otherwise, this is a control read...
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return 0x00;
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@ -45,5 +84,100 @@ void z8530::Channel::write(bool data, uint8_t pointer, uint8_t value) {
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if(data) {
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data_ = value;
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return;
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} else {
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switch(pointer) {
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default:
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LOG("[SCC] Unrecognised control write: " << PADHEX(2) << int(value) << " to register " << int(pointer));
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break;
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case 0x0: // Write register 0 — CRC reset and other functions.
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// Decode CRC reset instructions.
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switch(value >> 6) {
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default: /* Do nothing. */ break;
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case 1:
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LOG("[SCC] TODO: reset Rx CRC checker.");
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break;
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case 2:
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LOG("[SCC] TODO: reset Tx CRC checker.");
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break;
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case 3:
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LOG("[SCC] TODO: reset Tx underrun/EOM latch.");
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break;
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}
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// Decode command code.
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switch((value >> 3)&7) {
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default: /* Do nothing. */ break;
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case 2:
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LOG("[SCC] TODO: reset ext/status interrupts.");
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break;
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case 3:
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LOG("[SCC] TODO: send abort (SDLC).");
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break;
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case 4:
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LOG("[SCC] TODO: enable interrupt on next Rx character.");
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break;
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case 5:
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LOG("[SCC] TODO: reset Tx interrupt pending.");
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break;
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case 6:
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LOG("[SCC] TODO: reset error.");
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break;
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case 7:
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LOG("[SCC] TODO: reset highest IUS.");
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break;
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}
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break;
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case 0x1: // Write register 1 — Transmit/Receive Interrupt and Data Transfer Mode Definition.
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transfer_interrupt_mask_ = value;
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break;
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case 0x4: // Write register 4 — Transmit/Receive Miscellaneous Parameters and Modes.
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// Bits 0 and 1 select parity mode.
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if(!(value&1)) {
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parity_ = Parity::Off;
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} else {
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parity_ = (value&2) ? Parity::Even : Parity::Odd;
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}
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// Bits 2 and 3 select stop bits.
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switch((value >> 2)&3) {
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default: stop_bits_ = StopBits::Synchronous; break;
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case 1: stop_bits_ = StopBits::OneBit; break;
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case 2: stop_bits_ = StopBits::OneAndAHalfBits; break;
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case 3: stop_bits_ = StopBits::TwoBits; break;
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}
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// Bits 4 and 5 pick a sync mode.
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switch((value >> 4)&3) {
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default: sync_mode_ = Sync::Monosync; break;
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case 1: sync_mode_ = Sync::Bisync; break;
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case 2: sync_mode_ = Sync::SDLC; break;
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case 3: sync_mode_ = Sync::External; break;
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}
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// Bits 6 and 7 select a clock rate multiplier, unless synchronous
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// mode is enabled (and this is ignored if sync mode is external).
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if(stop_bits_ == StopBits::Synchronous) {
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clock_rate_multiplier_ = 1;
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} else {
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switch((value >> 6)&3) {
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default: clock_rate_multiplier_ = 1; break;
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case 1: clock_rate_multiplier_ = 16; break;
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case 2: clock_rate_multiplier_ = 32; break;
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case 3: clock_rate_multiplier_ = 64; break;
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}
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}
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break;
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case 0xf: // Write register 15 — External/Status Interrupt Control.
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interrupt_mask_ = value;
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break;
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}
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}
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}
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void z8530::set_dcd(int port, bool level) {
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// TODO.
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}
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@ -19,9 +19,9 @@ namespace SCC {
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*/
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class z8530 {
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public:
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void reset();
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/*
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**Interface for emulated machine.**
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Notes on addressing below:
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There's no inherent ordering of the two 'address' lines,
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@ -30,20 +30,46 @@ class z8530 {
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A/B = A0
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C/D = A1
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*/
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std::uint8_t read(int address);
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void write(int address, std::uint8_t value);
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void reset();
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bool get_interrupt_line();
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/*
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**Interface for serial port input.**
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*/
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void set_dcd(int port, bool level);
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private:
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class Channel {
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public:
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uint8_t read(bool data);
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uint8_t read(bool data, uint8_t pointer);
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void write(bool data, uint8_t pointer, uint8_t value);
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private:
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uint8_t data_ = 0xff;
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enum class Parity {
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Even, Odd, Off
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} parity_ = Parity::Off;
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enum class StopBits {
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Synchronous, OneBit, OneAndAHalfBits, TwoBits
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} stop_bits_ = StopBits::Synchronous;
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enum class Sync {
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Monosync, Bisync, SDLC, External
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} sync_mode_ = Sync::Monosync;
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int clock_rate_multiplier_ = 1;
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uint8_t transfer_interrupt_mask_ = 0; // i.e. Write Register 0x1.
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uint8_t interrupt_mask_ = 0; // i.e. Write Register 0xf.
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bool dcd_ = false;
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} channels_[2];
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uint8_t pointer_ = 0;
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uint8_t interrupt_vector_ = 0;
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};
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}
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@ -52,35 +52,33 @@ class QuadratureMouse: public Mouse {
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*/
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/*!
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Removes a single step from the current accumulated mouse movement;
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the step removed will henceforth be queriable via get_step.
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Applies a single step from the current accumulated mouse movement, which
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might involve the mouse moving right, or left, or not at all.
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*/
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void prepare_step() {
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for(int axis = 0; axis < 2; ++axis) {
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const int axis_value = axes_[axis];
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if(!axis_value) {
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step_[axis] = 0;
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if(!axis_value) continue;
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primaries_[axis] ^= 1;
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secondaries_[axis] = primaries_[axis];
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if(axis_value > 0) {
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-- axes_[axis];
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} else {
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if(axis_value > 0) {
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-- axes_[axis];
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step_[axis] = 1;
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} else {
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++ axes_[axis];
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step_[axis] = -1;
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}
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++ axes_[axis];
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secondaries_[axis] ^= 1;
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}
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}
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}
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/*!
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Gets and removes a single step from the current accumulated mouse
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movement for @c axis — axis 0 is x, axis 1 is y.
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@returns 0 if no movement is outstanding, -1 if there is outstanding
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negative movement, +1 if there is outstanding positive movement.
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@returns the two quadrature channels — bit 0 is the 'primary' channel
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(i.e. the one that can be monitored to observe velocity) and
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bit 1 is the 'secondary' (i.e. that which can be queried to
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observe direction).
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*/
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int get_step(int axis) {
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return step_[axis];
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int get_channel(int axis) {
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return primaries_[axis] | (secondaries_[axis] << 1);
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}
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/*!
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@ -94,8 +92,9 @@ class QuadratureMouse: public Mouse {
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int number_of_buttons_ = 0;
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std::atomic<int> button_flags_;
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std::atomic<int> axes_[2];
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int step_[2];
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int primaries_[2] = {0, 0};
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int secondaries_[2] = {0, 0};
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};
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}
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@ -142,14 +142,24 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
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// The keyboard also has a clock, albeit a very slow one.
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// Its clock and data lines are connected to the VIA.
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keyboard_clock_ += cycle.length;
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auto keyboard_ticks = keyboard_clock_.divide(HalfCycles(CLOCK_RATE / 100000));
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const auto keyboard_ticks = keyboard_clock_.divide(HalfCycles(CLOCK_RATE / 100000));
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if(keyboard_ticks > HalfCycles(0)) {
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keyboard_.run_for(keyboard_ticks);
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via_.set_control_line_input(MOS::MOS6522::Port::B, MOS::MOS6522::Line::Two, keyboard_.get_data());
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via_.set_control_line_input(MOS::MOS6522::Port::B, MOS::MOS6522::Line::One, keyboard_.get_clock());
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}
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// TODO: SCC is a divide-by-two.
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// Feed mouse inputs within at most 100 cycles of each other.
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time_since_mouse_update_ += cycle.length;
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const auto mouse_ticks = keyboard_clock_.divide(HalfCycles(200));
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if(mouse_ticks > HalfCycles(0)) {
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mouse_.prepare_step();
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scc_.set_dcd(0, mouse_.get_channel(0) & 1);
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scc_.set_dcd(1, mouse_.get_channel(1) & 1);
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}
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// TODO: SCC should be clocked at a divide-by-two, if and when it actually has
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// anything connected.
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// Consider updating the real-time clock.
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real_time_clock_ += cycle.length;
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@ -166,7 +176,11 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
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via_.set_control_line_input(MOS::MOS6522::Port::A, MOS::MOS6522::Line::One, !video_.vsync());
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// Update interrupt input. TODO: move this into a VIA/etc delegate callback?
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mc68000_.set_interrupt_level( (via_.get_interrupt_line() ? 1 : 0) );
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mc68000_.set_interrupt_level(
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(via_.get_interrupt_line() ? 1 : 0) |
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(scc_.get_interrupt_line() ? 2 : 0)
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/* TODO: to emulate a programmer's switch: have it set bit 2 when pressed. */
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);
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// A null cycle leaves nothing else to do.
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if(cycle.operation) {
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@ -432,8 +446,8 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
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case Port::B:
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return
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(mouse_.get_button_mask() & 1) ? 0x00 : 0x08 |
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(mouse_.get_step(1) > 0) ? 0x00 : 0x10 |
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(mouse_.get_step(0) > 0) ? 0x00 : 0x20 |
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((mouse_.get_channel(1) & 2) << 3) |
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((mouse_.get_channel(0) & 2) << 4) |
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(clock_.get_data() ? 0x02 : 0x00) |
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(video_.is_outputting() ? 0x00 : 0x40);
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}
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@ -492,6 +506,7 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
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HalfCycles video_clock_;
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// HalfCycles time_since_video_update_;
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HalfCycles time_since_iwm_update_;
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HalfCycles time_since_mouse_update_;
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bool ROM_is_overlay_ = true;
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int phase_ = 1;
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