From cd75978e4e76cf143b5fc3a3178974e06ffed49f Mon Sep 17 00:00:00 2001
From: Thomas Harte <thomas.harte@gmail.com>
Date: Sat, 12 Oct 2019 00:04:02 -0400
Subject: [PATCH] Nudges 6850 towards coherence.

---
 Components/6850/6850.cpp | 20 +++++++++++++++++++-
 Components/6850/6850.hpp | 19 +++++++++++++++++++
 2 files changed, 38 insertions(+), 1 deletion(-)

diff --git a/Components/6850/6850.cpp b/Components/6850/6850.cpp
index dfdfd9a4c..3809dd97e 100644
--- a/Components/6850/6850.cpp
+++ b/Components/6850/6850.cpp
@@ -8,13 +8,31 @@
 
 #include "6850.hpp"
 
+#define LOG_PREFIX "[6850] "
+#include "../../Outputs/Log.hpp"
+
 using namespace Motorola::ACIA;
 
 uint8_t ACIA::read(int address) {
-	return 0xff;
+	if(address&1) {
+		LOG("Read from receive register");
+	} else {
+		LOG("Read status");
+		return status_;
+	}
+	return 0x00;
 }
 
 void ACIA::write(int address, uint8_t value) {
+	if(address&1) {
+		LOG("Write to transmit register");
+	} else {
+		if((value&3) == 3) {
+			LOG("Reset");
+		} else {
+			LOG("Write to control register");
+		}
+	}
 }
 
 void ACIA::run_for(HalfCycles) {
diff --git a/Components/6850/6850.hpp b/Components/6850/6850.hpp
index a833a906c..b210ca1b8 100644
--- a/Components/6850/6850.hpp
+++ b/Components/6850/6850.hpp
@@ -17,10 +17,29 @@ namespace ACIA {
 
 class ACIA {
 	public:
+		/*!
+			Reads from the ACIA.
+
+			Bit 0 of the address is used as the ACIA's register select line —
+			so even addresses select control/status registers, odd addresses
+			select transmit/receive data registers.
+		*/
 		uint8_t read(int address);
+
+		/*!
+			Writes to the ACIA.
+
+			Bit 0 of the address is used as the ACIA's register select line —
+			so even addresses select control/status registers, odd addresses
+			select transmit/receive data registers.
+		*/
 		void write(int address, uint8_t value);
 
 		void run_for(HalfCycles);
+
+	private:
+		int divider_ = 1;
+		uint8_t status_ = 0x00;
 };
 
 }