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Fix interrupt acknowledge cycle: signals and data size.

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This commit is contained in:
Thomas Harte 2022-06-04 15:20:38 -04:00
parent 7eb00c131f
commit cfafbfd141
2 changed files with 12 additions and 6 deletions
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12
Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
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@ -547,13 +547,14 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
// Do the interrupt cycle, to obtain a vector. // Do the interrupt cycle, to obtain a vector.
temporary_address_.l = 0xffff'fff1 | uint32_t(captured_interrupt_level_ << 1); temporary_address_.l = 0xffff'fff1 | uint32_t(captured_interrupt_level_ << 1);
SetupDataAccess(0, Microcycle::InterruptAcknowledge); interrupt_cycles[0].address = interrupt_cycles[1].address = &temporary_address_.l;
SetDataAddress(temporary_address_.l); interrupt_cycles[0].value = interrupt_cycles[1].value = &temporary_value_.low;
Access(temporary_value_.low); // ni PerformBusOperation(interrupt_cycles[0]);
CompleteAccess(interrupt_cycles[1]); // ni
// If VPA is set, autovector. // If VPA is set, autovector.
if(vpa_) { if(vpa_) {
temporary_value_.w = uint16_t(InstructionSet::M68k::Exception::InterruptAutovectorBase - 1 + captured_interrupt_level_); temporary_value_.b = uint8_t(InstructionSet::M68k::Exception::InterruptAutovectorBase - 1 + captured_interrupt_level_);
} }
// TODO: if bus error is set, treat interrupt as spurious. // TODO: if bus error is set, treat interrupt as spurious.
@ -561,7 +562,6 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
IdleBus(3); // n- n IdleBus(3); // n- n
// Do the rest of the stack work. // Do the rest of the stack work.
SetupDataAccess(0, Microcycle::SelectWord);
SetDataAddress(registers_[15].l); SetDataAddress(registers_[15].l);
registers_[15].l -= 4; registers_[15].l -= 4;
@ -575,7 +575,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
SetupDataAccess(Microcycle::Read, Microcycle::SelectWord); SetupDataAccess(Microcycle::Read, Microcycle::SelectWord);
SetDataAddress(temporary_address_.l); SetDataAddress(temporary_address_.l);
temporary_address_.l = uint32_t(temporary_value_.w << 2); temporary_address_.l = uint32_t(temporary_value_.b << 2);
Access(program_counter_.high); // nV Access(program_counter_.high); // nV
temporary_address_.l += 2; temporary_address_.l += 2;

6
Processors/68000Mk2/Implementation/68000Mk2Storage.hpp
View File

@ -210,6 +210,12 @@ struct ProcessorBase: public InstructionSet::M68k::NullFlowController {
// Reset. // Reset.
Microcycle reset_cycle { Microcycle::Reset, HalfCycles(248) }; Microcycle reset_cycle { Microcycle::Reset, HalfCycles(248) };
// Interrupt acknowledge.
Microcycle interrupt_cycles[2] = {
{ Microcycle::InterruptAcknowledge | Microcycle::Read | Microcycle::NewAddress },
{ Microcycle::InterruptAcknowledge | Microcycle::Read | Microcycle::SameAddress | Microcycle::SelectByte },
};
// Holding spot when awaiting DTACK/etc. // Holding spot when awaiting DTACK/etc.
Microcycle awaiting_dtack; Microcycle awaiting_dtack;
}; };