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Implement the various to-[SR/CCR] actions, which do a 'repeat' prefetch.

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(which isn't exactly a repeat, at least in the SR cases, because the function code might have changed)
This commit is contained in:
Thomas Harte 2022-05-20 14:29:14 -04:00
parent 2d91fb5441
commit d157819c49
2 changed files with 23 additions and 1 deletions
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2
OSBindings/Mac/Clock SignalTests/68000ComparativeTests.mm
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@ -156,7 +156,7 @@ struct TestProcessor: public CPU::MC68000Mk2::BusHandler {
// To limit tests run to a subset of files and/or of tests, uncomment and fill in below.
_fileSet = [NSSet setWithArray:@[
// @"btst_bchg_bclr_bset.json",
@"btst_bchg_bclr_bset.json",
// Below this line are passing tests.
@"abcd_sbcd.json",

22
Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
View File

@ -106,6 +106,8 @@ enum ExecutionState: int {
MOVEPtoM_l,
MOVEPtoR_w,
MOVEPtoR_l,
LogicalToSR,
};
// MARK: - The state machine.
@ -597,6 +599,12 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
}
});
Duplicate(ORItoCCR, EORItoCCR); Duplicate(ANDItoCCR, EORItoCCR);
StdCASE(EORItoCCR, perform_state_ = LogicalToSR);
Duplicate(ORItoSR, EORItoSR); Duplicate(ANDItoSR, EORItoSR);
StdCASE(EORItoSR, perform_state_ = LogicalToSR);
default:
assert(false);
}
@ -1384,6 +1392,20 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
Prefetch(); // np
MoveToState(Decode);
//
// [EORI/ORI/ANDI] #, [CCR/SR]
//
BeginState(LogicalToSR):
// Perform the operation.
InstructionSet::M68k::perform<InstructionSet::M68k::Model::M68000>(
instruction_, operand_[0], operand_[1], status_, *static_cast<ProcessorBase *>(this));
// Recede the program counter and prefetch twice.
program_counter_.l -= 2;
Prefetch();
Prefetch();
MoveToState(Decode);
//
// Various states TODO.
//