6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2025-01-23 11:30:24 +00:00
Code Issues Projects Releases Wiki Activity

Ensures the MSX provides a clock to the VDP.

Browse Source
This commit is contained in:
Thomas Harte 2017-11-26 20:07:30 -05:00
parent 9cb6ca3440
commit d33612def5
3 changed files with 17 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Components/9918/9918.cpp
View File

@ -23,7 +23,7 @@ std::shared_ptr<Outputs::CRT::CRT> TMS9918::get_crt() {
return crt_;
}
void TMS9918::run_for(const Cycles cycles) {
void TMS9918::run_for(const HalfCycles cycles) {
}
void TMS9918::set_register(int address, uint8_t value) {

2
Components/9918/9918.hpp
View File

@ -34,7 +34,7 @@ class TMS9918 {
Runs the VCP for the number of cycles indicate; it is an implicit assumption of the code
that the input clock rate is 3579545 Hz — the NTSC colour clock rate.
*/
void run_for(const Cycles cycles);
void run_for(const HalfCycles cycles);
void set_register(int address, uint8_t value);
uint8_t get_register(int address);

17
Machines/MSX/MSX.cpp
View File

@ -61,7 +61,7 @@ class ConcreteMachine:
void run_for(const Cycles cycles) override {
z80_.run_for(cycles);
}
void configure_as_target(const StaticAnalyser::Target &target) override {
}
@ -84,6 +84,8 @@ class ConcreteMachine:
case CPU::Z80::PartialMachineCycle::Input:
switch(address & 0xff) {
case 0x98: case 0x99:
vdp_->run_for(time_since_vdp_update_);
time_since_vdp_update_ = 0;
*cycle.value = vdp_->get_register(address);
break;
@ -102,6 +104,8 @@ class ConcreteMachine:
case CPU::Z80::PartialMachineCycle::Output:
switch(address & 0xff) {
case 0x98: case 0x99:
vdp_->run_for(time_since_vdp_update_);
time_since_vdp_update_ = 0;
vdp_->set_register(address, *cycle.value);
break;
@ -127,7 +131,14 @@ class ConcreteMachine:
// Per the best information I currently have, the MSX inserts an extra cycle into each opcode read,
// but otherwise runs without pause.
return HalfCycles((cycle.operation == CPU::Z80::PartialMachineCycle::ReadOpcode) ? 2 : 0);;
HalfCycles addition((cycle.operation == CPU::Z80::PartialMachineCycle::ReadOpcode) ? 2 : 0);
time_since_vdp_update_ += cycle.length + addition;
return addition;
}
void flush() {
vdp_->run_for(time_since_vdp_update_);
time_since_vdp_update_ = 0;
}
// Obtains the system ROMs.
@ -173,6 +184,8 @@ class ConcreteMachine:
uint8_t ram_[65536];
uint8_t scratch_[16384];
std::vector<uint8_t> basic_, main_;
HalfCycles time_since_vdp_update_;
};
}