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Ensures the MSX provides a clock to the VDP.
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@ -23,7 +23,7 @@ std::shared_ptr<Outputs::CRT::CRT> TMS9918::get_crt() {
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return crt_;
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return crt_;
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}
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}
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void TMS9918::run_for(const Cycles cycles) {
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void TMS9918::run_for(const HalfCycles cycles) {
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}
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}
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void TMS9918::set_register(int address, uint8_t value) {
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void TMS9918::set_register(int address, uint8_t value) {
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@ -34,7 +34,7 @@ class TMS9918 {
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Runs the VCP for the number of cycles indicate; it is an implicit assumption of the code
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Runs the VCP for the number of cycles indicate; it is an implicit assumption of the code
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that the input clock rate is 3579545 Hz — the NTSC colour clock rate.
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that the input clock rate is 3579545 Hz — the NTSC colour clock rate.
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*/
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*/
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void run_for(const Cycles cycles);
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void run_for(const HalfCycles cycles);
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void set_register(int address, uint8_t value);
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void set_register(int address, uint8_t value);
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uint8_t get_register(int address);
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uint8_t get_register(int address);
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@ -84,6 +84,8 @@ class ConcreteMachine:
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case CPU::Z80::PartialMachineCycle::Input:
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case CPU::Z80::PartialMachineCycle::Input:
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switch(address & 0xff) {
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switch(address & 0xff) {
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case 0x98: case 0x99:
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case 0x98: case 0x99:
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vdp_->run_for(time_since_vdp_update_);
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time_since_vdp_update_ = 0;
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*cycle.value = vdp_->get_register(address);
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*cycle.value = vdp_->get_register(address);
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break;
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break;
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@ -102,6 +104,8 @@ class ConcreteMachine:
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case CPU::Z80::PartialMachineCycle::Output:
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case CPU::Z80::PartialMachineCycle::Output:
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switch(address & 0xff) {
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switch(address & 0xff) {
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case 0x98: case 0x99:
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case 0x98: case 0x99:
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vdp_->run_for(time_since_vdp_update_);
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time_since_vdp_update_ = 0;
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vdp_->set_register(address, *cycle.value);
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vdp_->set_register(address, *cycle.value);
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break;
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break;
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@ -127,7 +131,14 @@ class ConcreteMachine:
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// Per the best information I currently have, the MSX inserts an extra cycle into each opcode read,
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// Per the best information I currently have, the MSX inserts an extra cycle into each opcode read,
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// but otherwise runs without pause.
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// but otherwise runs without pause.
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return HalfCycles((cycle.operation == CPU::Z80::PartialMachineCycle::ReadOpcode) ? 2 : 0);;
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HalfCycles addition((cycle.operation == CPU::Z80::PartialMachineCycle::ReadOpcode) ? 2 : 0);
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time_since_vdp_update_ += cycle.length + addition;
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return addition;
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}
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void flush() {
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vdp_->run_for(time_since_vdp_update_);
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time_since_vdp_update_ = 0;
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}
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}
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// Obtains the system ROMs.
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// Obtains the system ROMs.
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@ -173,6 +184,8 @@ class ConcreteMachine:
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uint8_t ram_[65536];
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uint8_t ram_[65536];
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uint8_t scratch_[16384];
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uint8_t scratch_[16384];
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std::vector<uint8_t> basic_, main_;
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std::vector<uint8_t> basic_, main_;
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HalfCycles time_since_vdp_update_;
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};
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};
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}
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}
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