diff --git a/Machines/Apple/AppleIIgs/AppleIIgs.cpp b/Machines/Apple/AppleIIgs/AppleIIgs.cpp index 551e2cfde..10b95195a 100644 --- a/Machines/Apple/AppleIIgs/AppleIIgs.cpp +++ b/Machines/Apple/AppleIIgs/AppleIIgs.cpp @@ -392,6 +392,9 @@ class ConcreteMachine: } } + if(operation == CPU::WDC65816::BusOperation::ReadOpcode && address == 0x00fa56) { + printf("?"); + } // log |= (address >= 0xffa6d9) && (address < 0xffa6ec); if(log) { printf("%06x %s %02x", address, isReadOperation(operation) ? "->" : "<-", *value); @@ -405,7 +408,8 @@ class ConcreteMachine: m65816_.get_value_of_register(CPU::WDC65816::Register::Flags), m65816_.get_value_of_register(CPU::WDC65816::Register::DataBank), m65816_.get_value_of_register(CPU::WDC65816::Register::ProgramBank), - m65816_.get_value_of_register(CPU::WDC65816::Register::Direct) + m65816_.get_value_of_register(CPU::WDC65816::Register::Direct + ) ); } else printf("\n"); } diff --git a/Machines/Apple/AppleIIgs/MemoryMap.hpp b/Machines/Apple/AppleIIgs/MemoryMap.hpp index 67afc3d8e..2e5164bf6 100644 --- a/Machines/Apple/AppleIIgs/MemoryMap.hpp +++ b/Machines/Apple/AppleIIgs/MemoryMap.hpp @@ -275,6 +275,8 @@ class MemoryMap { e0_region.read = language_state.read ? ram : rom; e0_region.write = language_state.write ? nullptr : ram; + if(!bank_base) printf("eo region read: %d!\n", language_state.read); + // Assert assumptions made above re: memory layout. assert(region_map[bank_base | 0xd0] + 1 == region_map[bank_base | 0xe0]); assert(region_map[bank_base | 0xe0] == region_map[bank_base | 0xff]); @@ -290,6 +292,7 @@ class MemoryMap { }; if(inhibit_banks0001) { + printf("Language card: disabled!\n"); set_no_card(0x0000); set_no_card(0x0100); } else { diff --git a/Processors/65816/Implementation/65816Base.cpp b/Processors/65816/Implementation/65816Base.cpp index 5ec222156..f61b62248 100644 --- a/Processors/65816/Implementation/65816Base.cpp +++ b/Processors/65816/Implementation/65816Base.cpp @@ -17,8 +17,8 @@ uint16_t ProcessorBase::get_value_of_register(Register r) const { case Register::StackPointer: return registers_.s.full & (registers_.emulation_flag ? 0xff : 0xffff); case Register::Flags: return get_flags(); case Register::A: return registers_.a.full; - case Register::X: return registers_.x.full & registers_.x_masks[1]; - case Register::Y: return registers_.y.full & registers_.x_masks[1]; + case Register::X: return registers_.x.full; + case Register::Y: return registers_.y.full; case Register::EmulationFlag: return registers_.emulation_flag; case Register::DataBank: return registers_.data_bank >> 16; case Register::ProgramBank: return registers_.program_bank >> 16; @@ -33,8 +33,8 @@ void ProcessorBase::set_value_of_register(Register r, uint16_t value) { case Register::StackPointer: registers_.s.full = value; break; case Register::Flags: set_flags(uint8_t(value)); break; case Register::A: registers_.a.full = value; break; - case Register::X: registers_.x.full = value; break; - case Register::Y: registers_.y.full = value; break; + case Register::X: registers_.x.full = value & registers_.x_mask; break; + case Register::Y: registers_.y.full = value & registers_.x_mask; break; case Register::EmulationFlag: set_emulation_mode(value); break; case Register::DataBank: registers_.data_bank = uint32_t(value & 0xff) << 16; break; case Register::ProgramBank: registers_.program_bank = uint32_t(value &0xff) << 16; break; diff --git a/Processors/65816/Implementation/65816Implementation.hpp b/Processors/65816/Implementation/65816Implementation.hpp index 4e93ede48..8339f250b 100644 --- a/Processors/65816/Implementation/65816Implementation.hpp +++ b/Processors/65816/Implementation/65816Implementation.hpp @@ -19,8 +19,6 @@ template void Processor void Processor void Processor void Processor void Processor void Processor void Processor void Processor void Processor void Processor> registers_.m_shift) & 0xff -#define x_top() (registers_.x.full >> registers_.x_shift) & 0xff -#define y_top() (registers_.y.full >> registers_.x_shift) & 0xff -#define a_top() (registers_.a.full >> registers_.m_shift) & 0xff +#define LDA(src) registers_.a.full = (registers_.a.full & registers_.m_masks[0]) | (src & registers_.m_masks[1]) +#define LDXY(dest, src) dest = (src) & registers_.x_mask case OperationPerform: switch(active_instruction_->operation) { @@ -472,17 +467,17 @@ template void Processor void Processor void Processor void Processor void Processor void Processor> (8 + shift))&1; \ } - case CMP: cp(registers_.a, registers_.m_shift, registers_.m_masks); break; - case CPX: cp(registers_.x, registers_.x_shift, registers_.x_masks); break; - case CPY: cp(registers_.y, registers_.x_shift, registers_.x_masks); break; + case CMP: cp(registers_.a, registers_.m_shift, registers_.m_masks[1]); break; + case CPX: cp(registers_.x, registers_.x_shift, registers_.x_mask); break; + case CPY: cp(registers_.y, registers_.x_shift, registers_.x_mask); break; #undef cp @@ -895,7 +886,7 @@ template void Processor> (1 + registers_.m_shift))&0x40; registers_.flags.set_nz(uint16_t(result), registers_.m_shift); registers_.flags.carry = ((borrow >> 16)&1)^1; - LD(registers_.a, result, registers_.m_masks); + LDA(result); break; } @@ -932,7 +923,7 @@ template void Processor> (8 + registers_.m_shift))&1; - LD(registers_.a, result, registers_.m_masks); + LDA(result); } break; // @@ -950,12 +941,6 @@ template void Processor void Processor 8-bit. + uint8_t mx_flags[2] = {1, 1}; // [0] = m; [1] = x. In both cases either `0` or `1`; `1` => 8-bit. uint16_t m_masks[2] = {0xff00, 0x00ff}; // [0] = src mask; [1] = dst mask. - uint16_t x_masks[2] = {0xff00, 0x00ff}; // [0] = src mask; [1] = dst mask. + uint16_t x_mask = 0x00ff; // Just a mask representing the current size of the index registers. uint16_t e_masks[2] = {0xff00, 0x00ff}; int m_shift = 0; int x_shift = 0;