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Complete BTST/etc exclusions.

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This commit is contained in:
Thomas Harte 2022-04-20 16:16:24 -04:00
parent 85a0af03c1
commit d4fe9d8166
1 changed files with 38 additions and 3 deletions
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41
InstructionSets/68k/Decoder.cpp
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@ -219,8 +219,7 @@ template <uint8_t op, bool validate> Preinstruction Predecoder<model>::validated
return Preinstruction();
}
case OpT(Operation::BTST): case OpT(Operation::BCHG):
case OpT(Operation::BSET): case OpT(Operation::BCLR):
case OpT(Operation::BTST):
switch(original.mode<1>()) {
default: return original;
@ -228,7 +227,43 @@ template <uint8_t op, bool validate> Preinstruction Predecoder<model>::validated
case AddressingMode::AddressRegisterDirect:
return Preinstruction();
}
}
case OpT(Operation::BCHG):
case OpT(Operation::BSET): case OpT(Operation::BCLR):
case BCHGI: case BSETI: case BCLRI:
switch(original.mode<1>()) {
default: return original;
case AddressingMode::None:
case AddressingMode::AddressRegisterDirect:
case AddressingMode::ProgramCounterIndirectWithDisplacement:
case AddressingMode::ProgramCounterIndirectWithIndex8bitDisplacement:
case AddressingMode::ImmediateData:
return Preinstruction();
}
case BTSTI:
switch(original.mode<1>()) {
default: return original;
case AddressingMode::None:
case AddressingMode::AddressRegisterDirect:
case AddressingMode::ImmediateData:
return Preinstruction();
}
//
// case BCHGI: case BSETI: case BCLRI:
// switch(original.mode<1>()) {
// default: return original;
//
// case AddressingMode::None:
// case AddressingMode::AddressRegisterDirect:
// case AddressingMode::ProgramCounterIndirectWithDisplacement:
// case AddressingMode::ProgramCounterIndirectWithIndex8bitDisplacement:
// case AddressingMode::ImmediateData:
// return Preinstruction();
// }
}
}
/// Decodes the fields within an instruction and constructs a `Preinstruction`, given that the operation has already been