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Introduces RAM access delays.

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This commit is contained in:
Thomas Harte 2019-08-02 22:12:34 -04:00
parent 5e76d593af
commit d67c5145c0
1 changed files with 17 additions and 8 deletions
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25
Machines/Apple/Macintosh/Macintosh.cpp
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@ -155,18 +155,25 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
using Microcycle = CPU::MC68000::Microcycle; using Microcycle = CPU::MC68000::Microcycle;
HalfCycles perform_bus_operation(const Microcycle &cycle, int is_supervisor) { HalfCycles perform_bus_operation(const Microcycle &cycle, int is_supervisor) {
// TODO: pick a delay if this is a video-clashing memory fetch.
HalfCycles delay(0); HalfCycles delay(0);
// Advance tie. // Grab the word-precision address being accessed.
run_for(cycle.length + delay); uint32_t word_address = 0;
// Take a sneak peak and add a delay if this is a RAM access that would overlap with video.
if(cycle.data_select_active()) {
word_address = cycle.active_operation_word_address();
if(memory_map_[word_address >> 18] == BusDevice::RAM && ram_subcycle_ < 4) {
delay = HalfCycles(4 - ram_subcycle_);
}
}
// Advance time.
advance_time(cycle.length + delay);
// A null cycle leaves nothing else to do. // A null cycle leaves nothing else to do.
if(!(cycle.operation & (Microcycle::NewAddress | Microcycle::SameAddress))) return delay; if(!(cycle.operation & (Microcycle::NewAddress | Microcycle::SameAddress))) return delay;
// Grab the word-precision address being accessed.
auto word_address = cycle.active_operation_word_address();
// Everything above E0 0000 is signalled as being on the peripheral bus. // Everything above E0 0000 is signalled as being on the peripheral bus.
mc68000_.set_is_peripheral_address(word_address >= 0x700000); mc68000_.set_is_peripheral_address(word_address >= 0x700000);
@ -177,7 +184,7 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
uint16_t *memory_base = nullptr; uint16_t *memory_base = nullptr;
switch(memory_map_[word_address >> 18]) { switch(memory_map_[word_address >> 18]) {
default: break; default: assert(false);
case BusDevice::Unassigned: case BusDevice::Unassigned:
fill_unmapped(cycle); fill_unmapped(cycle);
@ -426,9 +433,10 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
} }
/// Advances all non-CPU components by @c duration half cycles. /// Advances all non-CPU components by @c duration half cycles.
forceinline void run_for(HalfCycles duration) { forceinline void advance_time(HalfCycles duration) {
time_since_video_update_ += duration; time_since_video_update_ += duration;
iwm_.time_since_update += duration; iwm_.time_since_update += duration;
ram_subcycle_ = (ram_subcycle_ + duration.as_int()) & 15;
// The VIA runs at one-tenth of the 68000's clock speed, in sync with the E clock. // The VIA runs at one-tenth of the 68000's clock speed, in sync with the E clock.
// See: Guide to the Macintosh Hardware Family p149 (PDF p188). Some extra division // See: Guide to the Macintosh Hardware Family p149 (PDF p188). Some extra division
@ -653,6 +661,7 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
bool ROM_is_overlay_ = true; bool ROM_is_overlay_ = true;
int phase_ = 1; int phase_ = 1;
int ram_subcycle_ = 0;
DoubleDensityDrive drives_[2]; DoubleDensityDrive drives_[2];
Inputs::QuadratureMouse mouse_; Inputs::QuadratureMouse mouse_;