From d787af89c5eb8d5190d36efa04f5f5f0bbf46cd5 Mon Sep 17 00:00:00 2001
From: Thomas Harte <thomas.harte@gmail.com>
Date: Mon, 16 Mar 2026 15:03:48 -0400
Subject: [PATCH] Write ADDD result back.

---
 OSBindings/Mac/Clock SignalTests/6809Tests.mm | 14 ++++----------
 Processors/6809/Perform.hpp                   |  1 +
 2 files changed, 5 insertions(+), 10 deletions(-)

diff --git a/OSBindings/Mac/Clock SignalTests/6809Tests.mm b/OSBindings/Mac/Clock SignalTests/6809Tests.mm
index fec248077..9eab34ab8 100644
--- a/OSBindings/Mac/Clock SignalTests/6809Tests.mm	
+++ b/OSBindings/Mac/Clock SignalTests/6809Tests.mm	
@@ -174,10 +174,10 @@ struct M6809Traits {
 
 	// Known failures, for transient enabling and disabling:
 	switch(opcode) {
-		case 0x30:	// LEAX indirect.
-		case 0x31:	// LEAY indirect.
-		case 0x32:	// LEAS indirect.
-		case 0x33:	// LEAU indirect.
+		case 0x30:	// LEAX indexed.
+		case 0x31:	// LEAY indexed.
+		case 0x32:	// LEAS indexed.
+		case 0x33:	// LEAU indexed.
 
 		case 0x60:	// NEG indexed.
 		case 0x63:	// COM indexed.
@@ -209,10 +209,6 @@ struct M6809Traits {
 		case 0xae:	// LDX indexed.
 		case 0xaf:	// STX indexed.
 
-		case 0xc3:	// ADDD immediate.
-
-		case 0xd3:	// ADDD direct.
-
 		case 0xe0:	// SUBB indexed.
 		case 0xe1:	// CMPB indexed.
 		case 0xe2:	// SBCB indexed.
@@ -230,8 +226,6 @@ struct M6809Traits {
 		case 0xee:	// LDU indexed.
 		case 0xef:	// STD indexed.
 
-		case 0xf3:	// ADDD extended.
-
 		case 0x1023:	// LBLS
 		case 0x102f:	// LBLE
 
diff --git a/Processors/6809/Perform.hpp b/Processors/6809/Perform.hpp
index edecdd3ff..c822e8610 100644
--- a/Processors/6809/Perform.hpp
+++ b/Processors/6809/Perform.hpp
@@ -129,6 +129,7 @@ inline void addd(Registers &registers, const uint16_t operand) {
 	registers.cc.set_nz(result);
 	registers.cc.set<ConditionCode::Carry>(result < operand);
 	registers.cc.set_overflow(result, source, operand);
+	registers.reg<R16::D>() = result;
 }
 
 template <R8 r, bool with_carry, bool store_result>